Trending IC design directions in 2022
For the non-stop demands for a better and smarter society, the number of electronic devices
keeps increasing exponentially; and the computation power, communication data rate, smart …
keeps increasing exponentially; and the computation power, communication data rate, smart …
Insights into architectural spurs in high performance fractional-N frequency synthesizers
A fractional-N frequency synthesizer inherently exhibits spurs by virtue of the fact that its
output frequency is not an integer multiple of its reference frequency. Until recently, it …
output frequency is not an integer multiple of its reference frequency. Until recently, it …
A Wideband LO Generator for 5G FR1 Bands Using a Single LC-VCO-Based Subsampling PLL and a Ring-VCO-Based Fractional-Resolution Frequency Multiplier
In this work, an ultra-low-jitter wideband cascaded local oscillation (LO) generator for 5G
frequency range 1 (FR1) is presented. Using the phase-rotating divider (PRD) of the 2nd …
frequency range 1 (FR1) is presented. Using the phase-rotating divider (PRD) of the 2nd …
A 30-GHz class-F quadrature DCO using phase shifts between drain–gate–source for low flicker phase noise and I/Q exactness
In this article, we present a low phase noise (PN) mm-wave quadrature digitally controlled
oscillator (DCO) exploiting transformers for class-F operation and harmonic extraction. A …
oscillator (DCO) exploiting transformers for class-F operation and harmonic extraction. A …
A Low-Power 256-Element -Band CMOS Phased-Array Receiver With On-Chip Distributed Radiation Sensors for Small Satellite Constellations
This article presents a low-power 256-element-band CMOS phased-array receiver utilizing
ON-chip distributed radiation sensors for the low Earth orbit (LEO) small satellite …
ON-chip distributed radiation sensors for the low Earth orbit (LEO) small satellite …
A low-phase-noise quad-core millimeter-wave fundamental VCO using circular triple-coupled transformer in 65-nm CMOS
The minimal achievable phase noise (PN) of millimeter-wave (mm-wave) voltage-controlled
oscillators (VCOs) is bounded by the smallest realizable inductor with a reasonable high …
oscillators (VCOs) is bounded by the smallest realizable inductor with a reasonable high …
A Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching Achieving 68.6 fs-rms-Total-Integrated-Jitter and 1.56 μs-Locking …
SM Dartizio, F Buccoleri, F Tesolin… - IEEE Journal of Solid …, 2022 - ieeexplore.ieee.org
This work presents a fast-locking and low-jitter fractional-bang-bang phase-locked loop
(BBPLL). To break the trade-off between jitter and locking time which is typical of BBPLLs …
(BBPLL). To break the trade-off between jitter and locking time which is typical of BBPLLs …
A 13.5-nA quiescent current LDO with adaptive ultra-low-power mode for low-power IoT applications
JS Kim, K Javed, KH Min, J Roh - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
This brief presents a low-dropout regulator (LDO) for power-efficient Internet of Things (IoT)
devices. When IoT devices are in low-power standby mode, the proposed LDO senses the …
devices. When IoT devices are in low-power standby mode, the proposed LDO senses the …
An Enhanced Class-F Dual-Core VCO With Common-Mode-Noise Self-Cancellation and Isolation Technique
In this article, an enhanced class-F voltage-controlled oscillator (VCO) with common-mode-
noise self-cancellation (CM-NC) and common-mode-noise isolation (CM-NI) technique is …
noise self-cancellation (CM-NC) and common-mode-noise isolation (CM-NI) technique is …
A Low-Spur and Low-Jitter Fractional- Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive Dithering
This work presents a low-spur and low-jitter fractional-digital phase-locked loop (PLL). To
reduce the fractional spurs caused by the non-linearity of the digital-to-time converter (DTC) …
reduce the fractional spurs caused by the non-linearity of the digital-to-time converter (DTC) …