Artificial visual perception neural system using a solution-processable MoS2-based in-memory light sensor

D Kumar, L Joharji, H Li, A Rezk, A Nayfeh… - Light: Science & …, 2023 - nature.com
Optoelectronic devices are advantageous in in-memory light sensing for visual information
processing, recognition, and storage in an energy-efficient manner. Recently, in-memory …

Dielectric engineered two-dimensional neuromorphic transistors

D Xiang, T Liu, X Zhang, P Zhou, W Chen - Nano Letters, 2021 - ACS Publications
Two-dimensional (2D) materials, which exhibit planar-wafer technique compatibility and
pure electrically triggered communication, have established themselves as potential …

Performance enhancement of multilevel cell nonvolatile memory by using a bandgap engineered high-κ trapping layer

C Zhu, Z Huo, Z Xu, M Zhang, Q Wang, J Liu… - Applied Physics …, 2010 - pubs.aip.org
A high-κ based charge trap flash (CTF) memory structure using bandgap engineered
trapping layer HfO 2/Al 2 O 3/HfO 2 (HAH) has been demonstrated for multilevel cell …

Over- and Undercoordinated Atoms as a Source of Electron and Hole Traps in Amorphous Silicon Nitride (a-Si3N4)

C Wilhelmer, D Waldhoer, L Cvitkovich, D Milardovich… - Nanomaterials, 2023 - mdpi.com
Silicon nitride films are widely used as the charge storage layer of charge trap flash (CTF)
devices due to their high charge trap densities. The nature of the charge trapping sites in …

Charge Storage and Reliability Characteristics of Nonvolatile Memory Capacitors with HfO2/Al2O3-Based Charge Trapping Layers

D Spassov, A Paskaleva, E Guziewicz, W Wozniak… - Materials, 2022 - mdpi.com
Flash memories are the preferred choice for data storage in portable gadgets. The charge
trapping nonvolatile flash memories are the main contender to replace standard floating …

Holistic optimization of trap distribution for performance/reliability in 3-D NAND flash using machine learning

K Nam, C Park, H Yun, JS Yoon, H Jang, K Cho… - IEEE …, 2023 - ieeexplore.ieee.org
A machine learning (ML) method was used to optimize the trap distribution of the charge trap
nitride (CTN) to simultaneously improve its performance/reliability (P/R) characteristics …

Explanation of the charge trapping properties of silicon nitride storage layers for NVMs—Part II: Atomistic and electrical modeling

E Vianello, F Driussi, P Blaise, P Palestri… - … on Electron Devices, 2011 - ieeexplore.ieee.org
Based on the material analysis of the SiN layers presented in part I of this paper, we develop
accurate atomistic and electrical models for the silicon nitride (SiN)-based nonvolatile …

Origin of incremental step pulse programming (ISPP) slope degradation in charge trap nitride based multi-layer 3D NAND flash

K Nam, C Park, JS Yoon, H Jang, MS Park, J Sim… - Solid-State …, 2021 - Elsevier
Abstract We analyzed Incremental Step Pulse Programming (ISPP) slope degradation to
improve the program efficiency of 3D NAND Flash memory using both measurement and …

Tailoring the Electrical Properties of HfO2 MOS-Devices by Aluminum Doping

A Paskaleva, M Rommel, A Hutzler… - … applied materials & …, 2015 - ACS Publications
In this work dielectric and electrical properties of Al-doped HfO2 layers deposited by plasma-
enhanced atomic layer deposition in dependence on the thickness and the added Al amount …

Threshold voltage instability in III-nitride heterostructure metal–insulator–semiconductor high-electron-mobility transistors: Characterization and interface engineering

S Huang, X Wang, Y Yao, K Deng, Y Yang… - Applied Physics …, 2024 - pubs.aip.org
III-nitride heterostructure-based metal–insulator–semiconductor high-electron-mobility
transistors (MIS-HEMTs), compared with Schottky and p-GaN gate HEMTs, have …