Power reduction techniques for microprocessor systems

V Venkatachalam, M Franz - ACM Computing Surveys (CSUR), 2005 - dl.acm.org
Power consumption is a major factor that limits the performance of computers. We survey the
“state of the art” in techniques that reduce the total power consumed by a microprocessor …

Near-threshold RISC-V core with DSP extensions for scalable IoT endpoint devices

M Gautschi, PD Schiavone, A Traber… - IEEE transactions on …, 2017 - ieeexplore.ieee.org
Endpoint devices for Internet-of-Things not only need to work under extremely tight power
envelope of a few milliwatts, but also need to be flexible in their computing capabilities, from …

LLVM: A compilation framework for lifelong program analysis & transformation

C Lattner, V Adve - … on code generation and optimization, 2004 …, 2004 - ieeexplore.ieee.org
We describe LLVM (low level virtual machine), a compiler framework designed to support
transparent, lifelong program analysis and transformation for arbitrary programs, by …

[图书][B] Embedded system design: embedded systems foundations of cyber-physical systems, and the internet of things

P Marwedel - 2021 - library.oapen.org
A unique feature of this open access textbook is to provide a comprehensive introduction to
the fundamental knowledge in embedded systems, with applications in cyber-physical …

[图书][B] Memory systems: cache, DRAM, disk

B Jacob, D Wang, S Ng - 2010 - books.google.com
Is your memory hierarchy stopping your microprocessor from performing at the high level it
should be? Memory Systems: Cache, DRAM, Disk shows you how to resolve this problem …

Scheduling and locking in multiprocessor real-time operating systems

BB Brandenburg - 2011 - search.proquest.com
With the widespread adoption of multicore architectures, multiprocessors are now a
standard deployment platform for (soft) real-time applications. This dissertation addresses …

[图书][B] Industrial communication technology handbook

R Zurawski - 2014 - books.google.com
Featuring contributions from major technology vendors, industry consortia, and government
and private research establishments, the Industrial Communication Technology Handbook …

Coloris: a dynamic cache partitioning system using page coloring

Y Ye, R West, Z Cheng, Y Li - … of the 23rd international conference on …, 2014 - dl.acm.org
Shared caches in multicore processors are subject to contention from co-running threads.
The resultant interference can lead to highly-variable performance for individual …

An optimal memory allocation scheme for scratch-pad-based embedded systems

O Avissar, R Barua, D Stewart - ACM Transactions on Embedded …, 2002 - dl.acm.org
This article presents a technique for the efficient compiler management of software-exposed
heterogeneous memory. In many lower-end embedded chips, often used in microcontrollers …

Energy-aware data allocation with hybrid memory for mobile cloud systems

M Qiu, Z Chen, Z Ming, X Qin, J Niu - IEEE Systems Journal, 2014 - ieeexplore.ieee.org
Resource scheduling is one of the most important issues in mobile cloud computing due to
the constraints in memory, CPU, and bandwidth. High energy consumption and low …