Multi-electrostatic FPGA placement considering SLICEL-SLICEM heterogeneity and clock feasibility

J Mai, Y Meng, Z Di, Y Lin - Proceedings of the 59th ACM/IEEE Design …, 2022 - dl.acm.org
Modern field-programmable gate arrays (FPGAs) contain heterogeneous resources,
including CLB, DSP, BRAM, IO, etc. A Configurable Logic Block (CLB) slice is further …

OpenPARF: an open-source placement and routing framework for large-scale heterogeneous FPGAs with deep learning toolkit

J Mai, J Wang, Z Di, G Luo, Y Liang… - 2023 IEEE 15th …, 2023 - ieeexplore.ieee.org
This paper proposes OpenPARF, an open-source placement and routing framework for
large-scale FPGA designs 1. OpenPARF is implemented with the deep learning toolkit …

Application of Machine Learning in FPGA EDA Tool Development

P Goswami, D Bhatia - IEEE Access, 2023 - ieeexplore.ieee.org
With the recent advances in hardware technologies like advanced CPUs and GPUs and the
large availability of open-source libraries, machine learning has penetrated various …

LEAPS: Topological-Layout-Adaptable Multi-Die FPGA Placement for Super Long Line Minimization

Z Di, R Tao, J Mai, L Chen, Y Lin - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
Multi-die FPGAs are crucial components in modern computing systems, particularly for high-
performance applications such as artificial intelligence and data centers. Super long lines …

High-performance Placement Engine for Modern Large-scale FPGAs With Heterogeneity and Clock Constraints

Z Zhu, Y Mei, K Deng, H He, J Chen… - … on Computer-Aided …, 2023 - ieeexplore.ieee.org
As field-programmable gate array (FPGA) architectures continue to evolve and become
more complex, the heterogeneity and clock constraints imposed by modern FPGAs have …

[HTML][HTML] Timing-Driven Simulated Annealing for FPGA Placement in Neural Network Realization

L Yu, B Guo - Electronics, 2023 - mdpi.com
The simulated annealing algorithm is an extensively utilized heuristic method for
heterogeneous FPGA placement. As the application of neural network models on FPGAs …

[PDF][PDF] OpenPARF: 基于深度学习工具包的大规模异构FPGA 开源布局布线框架

麦景, 王嘉睿, 邸志雄, 林亦波 - 电子与信息学报, 2023 - jeit.ac.cn
该文提出一个面向大规模可编辑逻辑门阵列(FPGA) 的开源布局布线框架OpenPARF.
该框架基于深度学习工具包PyTorch 实现, 支持GPU 大规模并行计算求解. 在布局算法方面 …

DREAMPlaceFPGA-MP: An Open-Source GPU-Accelerated Macro Placer for Modern FPGAs with Cascade Shapes and Region Constraints

Z Xiong, RS Rajarathnam, Z Jiang, H Zhu… - arXiv preprint arXiv …, 2023 - arxiv.org
FPGA macro placement plays a pivotal role in routability and timing closer to the modern
FPGA physical design flow. In modern FPGAs, macros could be subject to complex cascade …

Multi-Electrostatic FPGA Placement Considering SLICEL-SLICEM Heterogeneity, Clock Feasibility, and Timing Optimization

J Mai, J Wang, Z Di, Y Lin - IEEE Transactions on Computer …, 2023 - ieeexplore.ieee.org
When modern FPGA architecture becomes increasingly complicated, modern FPGA
placement is a mixed optimization problem with multiple objectives, including wirelength …

[引用][C] Integrating operations research into very large-scale integrated circuits placement design: A review

B Zhang, L Zhen, S Wang, F Yang - Asia-Pacific Journal of …, 2024 - World Scientific
The placement stage of the physical design of very large-scale integrated circuits (VLSI)
specifies the arrangement and order of standard cells and devices within an area, and the …