Real-time visual tracking under arbitrary illumination changes
G Silveira, E Malis - … IEEE Conference on Computer Vision and …, 2007 - ieeexplore.ieee.org
In this paper, we investigate how to improve the robustness of visual tracking methods with
respect to generic lighting changes. We propose a new approach to the direct image …
respect to generic lighting changes. We propose a new approach to the direct image …
虫孔路由NOC 的缓冲分配算法
王力纬, 曹阳, 李晓辉, 朱小虎 - 北京邮电大学学报, 2008 - journal.bupt.edu.cn
提出了一种可应用于虫孔路由片上网络(NOC) 的缓冲分配算法. 在满足系统总缓冲资源大小不变
的情况下, 该算法可以依据业务流量的特征在各个路由器的输入通道间分配缓冲资源 …
的情况下, 该算法可以依据业务流量的特征在各个路由器的输入通道间分配缓冲资源 …
A simulation based buffer sizing algorithm for network on chips
Buffers in on-chip networks constitute a significant proportion of the power consumption and
area of the interconnect. Hence, reducing the buffering overhead of Networks on Chips …
area of the interconnect. Hence, reducing the buffering overhead of Networks on Chips …
A Buffer‐Sizing Algorithm for Network‐on‐Chips with Multiple Voltage‐Frequency Islands
Buffers in on‐chip networks constitute a significant proportion of the power consumption and
area of the interconnect, and hence reducing them is an important problem. Application …
area of the interconnect, and hence reducing them is an important problem. Application …
Worst-case flit and packet delay bounds in wormhole networks on chip
Y Qian, Z Lu, W Dou - IEICE transactions on fundamentals of …, 2009 - search.ieice.org
We investigate per-flow flit and packet worst-case delay bounds in on-chip wormhole
networks. Such investigation is essential in order to provide guarantees under worst-case …
networks. Such investigation is essential in order to provide guarantees under worst-case …
Optimal buffering resources allocation of on-chip networks with finite buffers
LW Wang - 2011 4th International Conference on Intelligent …, 2011 - ieeexplore.ieee.org
A novel buffer allocation algorithm for deterministically-routed and wormhole-switched
network-on-chip (NoC) with finite size buffers is proposed. Based on a analytical model, the …
network-on-chip (NoC) with finite size buffers is proposed. Based on a analytical model, the …
Analysis of worst-case backlog bounds for Networks-on-Chip
In networks-on-chips (NoCs), analyzing the worst-case backlog bounds of routers is very
important to identify network congestions and improve network performance. In this paper …
important to identify network congestions and improve network performance. In this paper …
A virtual channel calculation algorithm for application specific on-chip networks
LW Wang - 2010 Third International Conference on Intelligent …, 2010 - ieeexplore.ieee.org
A virtual channel (VC) calculation algorithm for wormhole-switched on-chip networks is
proposed. Traditionally, the virtual channels were allocated uniformly, which results in a …
proposed. Traditionally, the virtual channels were allocated uniformly, which results in a …
[PDF][PDF] A tutorial on GENETIK simulation and scheduling
K Concannon, P Becker - 1990 - repository.lib.ncsu.edu
ABSTRACT GENETIK is pioneering the application and development of the Visual
Interactive approach for solving a wide range of management and operational problems …
Interactive approach for solving a wide range of management and operational problems …
[PDF][PDF] Comparative performance analysis of k-ary n-cube topologies with multiple virtual channels and finite size buffers
Comparative performance studies of k-ary n-cubes under different design constraints and
operating conditions have been widely reported in the literature. When deterministic routing …
operating conditions have been widely reported in the literature. When deterministic routing …