A noise-based IC random number generator for applications in cryptography
CS Petrie, JA Connelly - … Transactions on Circuits and Systems I …, 2000 - ieeexplore.ieee.org
The design of a mixed-signal random number generator (RNG) integrated circuit (IC)
suitable for integration with hardware cryptographic systems is presented. Certain …
suitable for integration with hardware cryptographic systems is presented. Certain …
Computer-aided design of analog and mixed-signal integrated circuits
GGE Gielen, RA Rutenbar - Proceedings of the IEEE, 2000 - ieeexplore.ieee.org
This survey presents an overview of recent advances in the state of the art for computer-
aided design (CAD) tools for analog and mixed-signal integrated circuits (ICs). Analog …
aided design (CAD) tools for analog and mixed-signal integrated circuits (ICs). Analog …
Modeling and analysis of substrate coupling in integrated circuits
R Gharpurey, RG Meyer - IEEE journal of Solid-State circuits, 1996 - ieeexplore.ieee.org
This paper describes a fast and accurate simulator for characterizing the effects of substrate
coupling on integrated-circuit performance. The technique uses the electrostatic Green …
coupling on integrated-circuit performance. The technique uses the electrostatic Green …
Cell-level placement for improving substrate thermal distribution
CH Tsai, SM Kang - … Transactions on Computer-aided design of …, 2000 - ieeexplore.ieee.org
The dramatic increase of power consumption in very large scale integration circuits has led
to high operating temperature and large thermal gradient, thereby resulting in serious timing …
to high operating temperature and large thermal gradient, thereby resulting in serious timing …
A 90-dB SNR 2.5-MHz output-rate ADC using cascaded multibit delta-sigma modulation at 8/spl times/oversampling ratio
I Fujimori, L Longo, A Hairapetian… - IEEE Journal of Solid …, 2000 - ieeexplore.ieee.org
A 16-b 2.5-MHz output-rate analog-to-digital converter (ADC) for wireline communications
and high-speed instrumentation has been developed. A 2-1-1 cascaded delta-sigma …
and high-speed instrumentation has been developed. A 2-1-1 cascaded delta-sigma …
[图书][B] Model and design of bipolar and MOS current-mode logic: CML, ECL and SCL digital circuits
M Alioto, G Palumbo - 2005 - books.google.com
The main focus of this book is to provide the reader with a deep understanding of modeling
and design strategies of Current-Mode digital circuits, as well as to organize in a coherent …
and design strategies of Current-Mode digital circuits, as well as to organize in a coherent …
Design of mixed-signal systems-on-a-chip
K Kundert, H Chang, D Jefferies… - IEEE transactions on …, 2000 - ieeexplore.ieee.org
The electronics industry is increasingly focused on the consumer marketplace, which
requires low-cost high-volume products to be developed very rapidly. This, combined with …
requires low-cost high-volume products to be developed very rapidly. This, combined with …
Substrate noise coupling in SoC design: Modeling, avoidance, and validation
A Afzali-Kusha, M Nagata, NK Verghese… - Proceedings of the …, 2006 - ieeexplore.ieee.org
Issues related to substrate noise in system-on-chip design are described including the
physical phenomena responsible for its creation, coupling transmission mechanisms and …
physical phenomena responsible for its creation, coupling transmission mechanisms and …
Modeling and simulating electromagnetic fault injection
M Dumont, M Lisart, P Maurine - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
Electromagnetic fault injection (EMFI) has recently gained popularity as a mean to induce
faults because of its inherent advantages. Despite this popularity, there is only a little …
faults because of its inherent advantages. Despite this popularity, there is only a little …
Design strategies for source coupled logic gates
M Alioto, G Palumbo - … Transactions on Circuits and Systems I …, 2003 - ieeexplore.ieee.org
In this paper, a strategy for the design of source-coupled logic (SCL) gates both with and
without an output buffer is proposed. Closed-form design equations to size bias currents and …
without an output buffer is proposed. Closed-form design equations to size bias currents and …