Demystifying the system vulnerability stack: Transient fault effects across the layers
G Papadimitriou, D Gizopoulos - 2021 ACM/IEEE 48th Annual …, 2021 - ieeexplore.ieee.org
In this paper, we revisit the system vulnerability stack for transient faults. We reveal severe
pitfalls in widely used vulnerability measurement approaches, which separate the hardware …
pitfalls in widely used vulnerability measurement approaches, which separate the hardware …
Artificial neural networks for space and safety-critical applications: Reliability issues and potential solutions
P Rech - IEEE Transactions on Nuclear Science, 2024 - ieeexplore.ieee.org
Machine learning is among the greatest advancements in computer science and
engineering and is today used to classify or detect objects, a key feature in autonomous …
engineering and is today used to classify or detect objects, a key feature in autonomous …
Avgi: Microarchitecture-driven, fast and accurate vulnerability assessment
G Papadimitriou, D Gizopoulos - 2023 IEEE International …, 2023 - ieeexplore.ieee.org
We propose AVGI, a new Statistical Fault Injection (SFI)-based methodology, which delivers
orders of magnitude faster assessment of the Architectural Vulnerability Factor (AVF) of a …
orders of magnitude faster assessment of the Architectural Vulnerability Factor (AVF) of a …
[HTML][HTML] Open-source IP cores for space: A processor-level perspective on soft errors in the RISC-V era
This paper discusses principles and techniques to evaluate processors for dependable
computing in space applications. The focus is on soft errors, which dominate the failure rate …
computing in space applications. The focus is on soft errors, which dominate the failure rate …
Demystifying soft error assessment strategies on arm cpus: Microarchitectural fault injection vs. neutron beam experiments
A Chatzidimitriou, P Bodmann… - 2019 49th Annual …, 2019 - ieeexplore.ieee.org
Fault injection in early microarchitecture-level simulation CPU models and beam
experiments on the final physical CPU chip are two established methodologies to access the …
experiments on the final physical CPU chip are two established methodologies to access the …
Soft error effects on arm microprocessors: Early estimations versus chip measurements
PR Bodmann, G Papadimitriou… - IEEE Transactions …, 2021 - ieeexplore.ieee.org
Extensive research efforts are being carried out to evaluate and improve the reliability of
computing devices either through beam experiments or simulation-based fault injection …
computing devices either through beam experiments or simulation-based fault injection …
Silent data errors: Sources, detection, and modeling
A Singh, S Chakravarty, G Papadimitriou… - 2023 IEEE 41st VLSI …, 2023 - ieeexplore.ieee.org
Chip manufacturers and hyperscalers are becoming increasingly aware of the problem
posed by Silent Data Errors (SDE) and are taking steps to address it. Major computing …
posed by Silent Data Errors (SDE) and are taking steps to address it. Major computing …
Multi-bit upsets vulnerability analysis of modern microprocessors
A Chatzidimitriou, G Papadimitriou… - 2019 IEEE …, 2019 - ieeexplore.ieee.org
Miniaturization of integrated circuits brings more devices (thus more functionality) on the
same silicon area but also makes them more vulnerable to soft (transient) errors …
same silicon area but also makes them more vulnerable to soft (transient) errors …
Silent data corruptions: The stealthy saboteurs of digital integrity
G Papadimitriou, D Gizopoulos… - 2023 IEEE 29th …, 2023 - ieeexplore.ieee.org
Silent Data Corruptions (SDCs) pose a significant threat to the integrity of digital systems.
These stealthy saboteurs silently corrupt data, remaining undetected by traditional error …
These stealthy saboteurs silently corrupt data, remaining undetected by traditional error …
MeRLiN: Exploiting dynamic instruction behavior for fast and accurate microarchitecture level reliability assessment
Early reliability assessment of hardware structures using microarchitecture level simulators
can effectively guide major error protection decisions in microprocessor design. Statistical …
can effectively guide major error protection decisions in microprocessor design. Statistical …