Double-gate TFET with vertical channel sandwiched by lightly doped Si

JH Kim, S Kim, BG Park - IEEE Transactions on Electron …, 2019 - ieeexplore.ieee.org
This paper examines a tunnel field-effect transistor (TFET) as a promising device for
achieving steeper switching and better electrical performances in low-power operation. It …

Impact of temperature on analog/RF, linearity and reliability performance metrics of tunnel FET with ultra-thin source region

P Singh, DS Yadav - Applied physics A, 2021 - Springer
In this script, authors affirm a novel structure of tunnel FET in which a lightly doped channel
region completely bounds the ultra-thin finger-like source region to enhance the tunneling …

Gate-normal negative capacitance tunnel field-effect transistor (TFET) with channel doping engineering

HW Kim, D Kwon - IEEE Transactions on Nanotechnology, 2021 - ieeexplore.ieee.org
In this work, a negative capacitance tunnel FET (NCTFET) with the tunneling current in the
normal direction to the gate is proposed with channel doping engineering and its electrical …

Analysis of current variation with work function variation in l-shaped tunnel-field effect transistor

JH Kim, HW Kim, YS Song, S Kim, G Kim - Micromachines, 2020 - mdpi.com
In this paper, an investigation is performed to analyze the L-shaped tunnel field-effect
transistor (TFET) depending on a gate work function variation (WFV) with help of technology …

Analysis of nanoscale digital circuits using novel drain-gate underlap DMG hetero-dielectric TFET

D Gracia, D Nirmal, DJ Moni - Microelectronics Journal, 2022 - Elsevier
In this paper, the investigation of dual metal double gate (DMG) hetero-dielectric TFET with
drain-gate underlap for nanoscale digital applications is analyzed. Drain-gate underlap …

Gate field plate structure for subthreshold swing improvement of Si line-tunneling FETs

X Wang, Z Tang, L Cao, J Li, Y Liu - IEEE Access, 2019 - ieeexplore.ieee.org
Tunnel field-effect transistors (TFETs) are promising for use in ultralow-power applications
owing to their distinct band-to-band tunneling operation. However, the ON-state current of …

Demonstration of tunneling field-effect transistor ternary inverter

HW Kim, S Kim, K Lee, J Lee, BG Park… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
We demonstrate tunnel FET (TFET)-based ternary CMOS (T-CMOS) which can operate at
supplyvoltage (V DD)<; 0.6 V. The TFET T-CMOS consists of the vertical n/p TFETs and their …

Impactful study of f-shaped tunnel fet

P Singh, DS Yadav - Silicon, 2022 - Springer
In this proposed work, a novel single gate F-shaped channel tunnel field effect transistor (SG-
FC-TFET) is proposed and investigated. The impact of thickness of the source region and …

Low-power vertical tunnel field-effect transistor ternary inverter

HW Kim, D Kwon - IEEE Journal of the Electron Devices …, 2021 - ieeexplore.ieee.org
In this study, vertical tunnel FET-based ternary CMOS (T-CMOS) is introduced and its
electrical characteristics are investigated using TCAD device and mixed-mode simulations …

Si1-xGex Positive Feedback Field-effect Transistor with Steep Subthreshold Swing for Low-voltage Operation

S Hwang, H Kim, DW Kwon, JH Lee… - JSTS: Journal of …, 2017 - koreascience.kr
The most prominent challenge for MOSFET scaling is to reduce power consumption;
however, the supply voltage ($ V_ {DD} $) cannot be scaled down because of the carrier …