An overview of noise-shaping SAR ADC: From fundamentals to the frontier
The Noise-Shaping (NS) SAR is an attractive new ADC architecture that emerged in the last
decade. It combines the advantages of the SAR and the DSM architectures. NS SAR shows …
decade. It combines the advantages of the SAR and the DSM architectures. NS SAR shows …
A 0.5-V fully synthesizable SAR ADC for on-chip distributed waveform monitors
This paper presents a fully synthesizable successive-approximation-register (SAR) analog-
to-digital converter (ADC) for on-chip distributed waveform monitoring in a low-power system …
to-digital converter (ADC) for on-chip distributed waveform monitoring in a low-power system …
Recent advances in the three processes of NS SAR ADC
Abstract Noise Shaping (NS) SAR ADC is easier to achieve high SNDR than SAR ADC, and
has lower power consumption than SD ADC. Therefore, it has received extensive attention …
has lower power consumption than SD ADC. Therefore, it has received extensive attention …
An 84-dB-SNDR Low-OSR Fourth-Order Noise-Shaping SAR With an FIA-Assisted EF-CRFF Structure and Noise-Mitigated Push-Pull Buffer-in-Loop Technique
To design a low-oversampled high-resolution noise-shaping successive approximation
register (NS-SAR) analog-to-digital converters (ADCs), two main bottlenecks need to be …
register (NS-SAR) analog-to-digital converters (ADCs), two main bottlenecks need to be …
A configurable noise-shaping band-pass SAR ADC with two-stage clock-controlled amplifier
Z Jiao, Y Chen, X Su, Q Sun, X Wang… - … on Circuits and …, 2020 - ieeexplore.ieee.org
This article presents an 8×-oversampling successive approximation register (SAR) analog-to-
digital converter (ADC) with configurable center frequency of noise shaping (NS), which …
digital converter (ADC) with configurable center frequency of noise shaping (NS), which …
A fully passive noise-shaping SAR ADC utilizing last-bit majority voting and cyclic dynamic element matching techniques
This article presents a fully passive noise-shaping (NS) successive approximation register
(SAR) analog-to-digital converter (ADC) that can be compatible with dynamic voltage and …
(SAR) analog-to-digital converter (ADC) that can be compatible with dynamic voltage and …
OTA-free 1–1 MASH ADC using fully passive noise-shaping SAR & VCO ADC
ST Chandrasekaran, SP Bhanushali… - IEEE Journal of Solid …, 2021 - ieeexplore.ieee.org
We present an OTA-free 1–1 multi-stage noise-shaping (MASH) analog-to-digital converter
(ADC) utilizing a fully passive noise-shaping successive approximation register (NS-SAR) …
(ADC) utilizing a fully passive noise-shaping successive approximation register (NS-SAR) …
A 12-ENOB second-order noise-shaping SAR ADC With PVT-insensitive voltage–time–voltage converter
CC Chen, YH Huang, JCJS Marquez… - IEEE Journal of Solid …, 2023 - ieeexplore.ieee.org
This article presents a 12-effective number of bits (ENOB) second-order noise-shaping
successive approximation register (NS-SAR) analog-to-digital converter (ADC) with a …
successive approximation register (NS-SAR) analog-to-digital converter (ADC) with a …
A 1.8 V 98.6 dB SNDR discrete-time CMOS delta-sigma ADC
C Wei, C Chen, G Huang, L Huang, R Wang… - Microelectronics …, 2024 - Elsevier
This paper introduces a discrete-time delta-sigma ADC for the Internet of Things (IoT)
applications. It utilizes second-order 4-bit successive approximation register (SAR) quantizer …
applications. It utilizes second-order 4-bit successive approximation register (SAR) quantizer …
An area-efficient SAR ADC with mismatch error shaping technique achieving 102-dB SFDR 90.2-dB SNDR over 20-kHz bandwidth
C Yang, E Olieman, A Litjes, L Qiu… - … Transactions on Very …, 2021 - ieeexplore.ieee.org
To minimize the area of analog-to-digital converters (ADCs) for multichannel applications
and break the SNDR limitation caused by DAC-induced nonlinearity, a more area-efficient …
and break the SNDR limitation caused by DAC-induced nonlinearity, a more area-efficient …