Accurate operation delay prediction for FPGA HLS using graph neural networks
Modern heterogeneous FPGA architectures incorporate a variety of hardened blocks for
boosting the performance of arithmetic-intensive designs, such as DSP blocks and carry …
boosting the performance of arithmetic-intensive designs, such as DSP blocks and carry …
Pyramid: Machine learning framework to estimate the optimal timing and resource usage of a high-level synthesis design
The emergence of High-Level Synthesis (HLS) tools shifted the paradigm of hardware
design by making the process of mapping high-level programming languages to hardware …
design by making the process of mapping high-level programming languages to hardware …
Correlated multi-objective multi-fidelity optimization for HLS directives design
High-level synthesis (HLS) tools have gained great attention in recent years because it
emancipates engineers from the complicated and heavy hardware description language …
emancipates engineers from the complicated and heavy hardware description language …
Enabling design methodologies and future trends for edge AI: Specialization and codesign
This work is an introduction and a survey for the Special Issue on Machine Intelligence at the
Edge. The authors argue that workloads that were formerly performed in the cloud are …
Edge. The authors argue that workloads that were formerly performed in the cloud are …
Flowtune: Practical multi-armed bandits in boolean optimization
C Yu - Proceedings of the 39th International Conference on …, 2020 - dl.acm.org
Recent years have seen increasing employment of decision intelligence in electronic design
automation (EDA), which aims to reduce the manual efforts and boost the design closure …
automation (EDA), which aims to reduce the manual efforts and boost the design closure …
PTPT: Physical design tool parameter tuning via multi-objective Bayesian optimization
Physical design flow through associated electronic design automation (EDA) tools plays an
imperative role in the advanced integrated circuit design. Mostly, the parameters fed into …
imperative role in the advanced integrated circuit design. Mostly, the parameters fed into …
Machine learning for agile fpga design
Field-programmable gate arrays (FPGAs) have become popular means of hardware
acceleration since they offer massive parallelism, flexible configurability, and potentially …
acceleration since they offer massive parallelism, flexible configurability, and potentially …
FlowTune: End-to-end automatic logic optimization exploration via domain-specific multiarmed bandit
Design flows are the explicit combinations of design transformations, primarily involved in
synthesis, placement, and routing processes, to accomplish the design of integrated circuits …
synthesis, placement, and routing processes, to accomplish the design of integrated circuits …
Metrics2. 1 and flow tuning in the ieee ceda robust design flow and openroad iccad special session paper
In today's RTL-to-GDS flow domain, there is a lack of standards for reporting of design and
tool metrics. Moreover, each tool or engine has its own set of parameters that can change …
tool metrics. Moreover, each tool or engine has its own set of parameters that can change …
Machine learning for FPGA electronic design automation
A Biscontini, E Popovici, A Temko - IEEE Access, 2024 - ieeexplore.ieee.org
In the last decades, field-programmable gate arrays (FPGAs) have become increasingly
important to the electronics industry, offering higher performance and lower power …
important to the electronics industry, offering higher performance and lower power …