Emerging NVM: A survey on architectural integration and research challenges
There has been a surge of interest in Non-Volatile Memory (NVM) in recent years. With
many advantages, such as density and power consumption, NVM is carving out a place in …
many advantages, such as density and power consumption, NVM is carving out a place in …
A survey of architectural approaches for managing embedded DRAM and non-volatile on-chip caches
Recent trends of CMOS scaling and increasing number of on-chip cores have led to a large
increase in the size of on-chip caches. Since SRAM has low density and consumes large …
increase in the size of on-chip caches. Since SRAM has low density and consumes large …
Spin-transfer torque memories: Devices, circuits, and systems
Spin-transfer torque magnetic memory (STT-MRAM) has gained significant research interest
due to its nonvolatility and zero standby leakage, near unlimited endurance, excellent …
due to its nonvolatility and zero standby leakage, near unlimited endurance, excellent …
Field-free switching of VG-SOT-pMTJ device through the interplay of SOT, exchange bias, and VCMA effects
S Alla, V Kumar Joshi, S Bhat - Journal of Applied Physics, 2023 - pubs.aip.org
Field-free magnetization switching via the interplay of spin orbit torque (SOT), exchange bias
field ( HEX), and voltage controlled magnetic anisotropy (VCMA) is crucial for the …
field ( HEX), and voltage controlled magnetic anisotropy (VCMA) is crucial for the …
Improving write performance for STT-MRAM
Spin-transfer-torque magnetic random access memory (STT-MRAM) is a promising
emerging memory technology because of its various advantageous features such as …
emerging memory technology because of its various advantageous features such as …
Sequoia: A high-endurance NVM-based cache architecture
MR Jokar, M Arjomand… - IEEE transactions on very …, 2015 - ieeexplore.ieee.org
Emerging nonvolatile memory technologies, such as spin-transfer torque RAM or resistive
RAM, can increase the capacity of the last-level cache (LLC) in a latency and power-efficient …
RAM, can increase the capacity of the last-level cache (LLC) in a latency and power-efficient …
Challenges and solutions in emerging memory testing
The research and prototyping of new memory technologies are getting a lot of attention in
order to enable new (computer) architectures and provide new opportunities for today's and …
order to enable new (computer) architectures and provide new opportunities for today's and …
High performance and energy-efficient on-chip cache using dual port (1R/1W) spin-orbit torque MRAM
This paper proposes a dual (1R/1W) port spin-orbit torque magnetic random access memory
(1R/1W SOT-MRAM) for energy efficient on-chip cache applications. Our proposed dual port …
(1R/1W SOT-MRAM) for energy efficient on-chip cache applications. Our proposed dual port …
[图书][B] Flash Memory Integration: Performance and Energy Issues
J Boukhobza, P Olivier - 2017 - books.google.com
4 zettabytes (4 billion terabytes) of data generated in 2013, 44 zettabytes predicted for 2020
and 185 zettabytes for 2025. These figures are staggering and perfectly illustrate this new …
and 185 zettabytes for 2025. These figures are staggering and perfectly illustrate this new …
Exploring MRAM technologies for energy efficient systems-on-chip
S Senni, L Torres, G Sassatelli… - IEEE Journal on …, 2016 - ieeexplore.ieee.org
It has become increasingly challenging to respect Moore's well-known law in recent years.
Energy efficiency and manufacturing constraints are among the main challenges to current …
Energy efficiency and manufacturing constraints are among the main challenges to current …