An ultra-low power ISM-band integer-n frequency synthesizer dedicated to implantable medical microsystems

LF Tanguay, M Sawan - Analog Integrated Circuits and Signal Processing, 2009 - Springer
In this article, the architectural choices and design of a fully integrated integer-N frequency
synthesizer operating in the 902–928 MHz Industrial, Scientific and Medical (ISM) band is …

A 1.8-v 3.6-mw 2.4-ghz fully integrated cmos frequency synthesizer for the ieee 802.15. 4

MV Krishna, X Jie, AM Do, CC Boon, KS Yeo… - VLSI-SoC: Forward …, 2012 - Springer
This paper presents a low power 2.4-GHz fully integrated 1 MHz resolution IEEE 802.15. 4
frequency synthesizer designed using 0.18 um CMOS technology. An integer-N fully …

A 1.2 V 5.14 mW quadrature frequency synthesizer in 90nm CMOS technology for 2.4 GHz ZigBee applications

J Gines, R Doldán, A Villegas, AJ Acosta… - APCCAS 2008-2008 …, 2008 - ieeexplore.ieee.org
A low-cost 1.2 V 5.14 mW phase-lock loop (PLL) quadrature frequency synthesizer
compliant with the 2.4 GHz ZigBee standard (IEEE 802.15. 4) has been implemented in …

[HTML][HTML] A low phase noise ring-VCO based PLL using injection locking for ZigBee applications

F Talebi, H Ghafoorifard, S Sheikhaei, SSA Saleh - Circuits and Systems, 2013 - scirp.org
A low power low phase noise frequency synthesizer with subharmonic injection locking is
proposed for ZigBee applications. The PLL is based on a ring VCO to decrease area and …

Design and simulation of phase looked loop PLL based frequency synthesis

SA Albderi, KH Hussein, AA Kadhum… - AIP Conference …, 2023 - pubs.aip.org
Here research portrays the execution as well as activity highlights for a" Phase-Locked
Loop"(" PLL") engineering established frequency synthesizer for clock age also …

A 3.5-mW 2.45-GHz frequency synthesizer in 0.18 μm CMOS

YB Choi, X Yuan - 2009 IEEE International Symposium on …, 2009 - ieeexplore.ieee.org
A 3.5-mW, 2.45-GHz integer-N frequency synthesizer compliant to Zigbee standard is
presented. Addressing the high-speed low-voltage challenges confronting prescaler design …

A 640 µW frequency synthesizer dedicated to implantable medical microsystems in 90-nm CMOS

LF Tanguay, Y Savaria, M Sawan - Proceedings of the 8th IEEE …, 2010 - ieeexplore.ieee.org
This paper presents a 90-nm CMOS, ultra-low power frequency synthesizer dedicated to
implantable smart medical devices. A new supply regulated LC-VCO that reduces the impact …

1.2 mW 2.4 GHz PLL for ZigBee and BLE standard in single-well 0.18 µm CMOS with efficient divider architecture

RS Peerla, SS Regulagadda… - 2015 IEEE Asia …, 2015 - ieeexplore.ieee.org
This paper proposes a novel single-well VCO in PLL architecture targeting ZigBee (ZB) and
Bluetooth LE (BLE) band. It employs PMOS based charge recycling technique in Voltage …

System level realization and analysis of MEMS integrated voltage controlled oscillator

AR Chaudhuri, S Chakraborty… - 2009 Applied …, 2009 - ieeexplore.ieee.org
This paper presents the system level realization of a MEMS varactor based voltage
controlled oscillator (VCO). The MEMS varactor has been optimally designed with Finite …

Programmable PLL-based frequency synthesizer: Modeling and design considerations

RNS Raphael, MP Agord, LT Manera… - … Conference of Micro …, 2017 - ieeexplore.ieee.org
This work summarizes the set of building and operating features for a third-order Charge
Pump Phase-Locked Loop CP-PLL-based Frequency Synthesizer for clock generation. For …