A survey of network-based hardware accelerators
I Skliarova - Electronics, 2022 - mdpi.com
Many practical data-processing algorithms fail to execute efficiently on general-purpose
CPUs (Central Processing Units) due to the sequential matter of their operations and …
CPUs (Central Processing Units) due to the sequential matter of their operations and …
Learning from hypervectors: A survey on hypervector encoding
Hyperdimensional computing (HDC) is an emerging computing paradigm that imitates the
brain's structure to offer a powerful and efficient processing and learning model. In HDC, the …
brain's structure to offer a powerful and efficient processing and learning model. In HDC, the …
UGEMM: Unary computing architecture for GEMM applications
General matrix multiplication (GEMM) is universal in various applications, such as signal
processing, machine learning, and computer vision. Conventional GEMM hardware …
processing, machine learning, and computer vision. Conventional GEMM hardware …
Fast binary counters and compressors generated by sorting network
W Guo, S Li - IEEE Transactions on very large scale integration …, 2021 - ieeexplore.ieee.org
The summation of multiple operands in parallel forms part of the critical path in various
digital signal processing units. To speedup the summation, high compression ratio counters …
digital signal processing units. To speedup the summation, high compression ratio counters …
A computational temporal logic for superconducting accelerators
Superconducting logic offers the potential to perform computation at tremendous speeds
and energy savings. However, a" semantic gap" lies between the level-driven logic that …
and energy savings. However, a" semantic gap" lies between the level-driven logic that …
SkippyNN: An embedded stochastic-computing accelerator for convolutional neural networks
Employing convolutional neural networks (CNNs) in embedded devices seeks novel low-
cost and energy efficient CNN accelerators. Stochastic computing (SC) is a promising low …
cost and energy efficient CNN accelerators. Stochastic computing (SC) is a promising low …
Approximate hybrid binary-unary computing with applications in bert language model and image processing
A Khataei, G Singh, K Bazargan - Proceedings of the 2023 ACM/SIGDA …, 2023 - dl.acm.org
We propose a novel method for approximate hardware implementation of univariate math
functions with significantly fewer hardware resources compared to previous approaches …
functions with significantly fewer hardware resources compared to previous approaches …
Sorting in memristive memory
Sorting data is needed in many application domains. Traditionally, the data is read from
memory and sent to a general-purpose processor or application-specific hardware for …
memory and sent to a general-purpose processor or application-specific hardware for …
Cambricon-u: A systolic random increment memory architecture for unary computing
Unary computing, whose arithmetics require only one logic gate, has enabled efficient DNN
processing, especially on strictly power-constrained devices. However, unary computing still …
processing, especially on strictly power-constrained devices. However, unary computing still …
uSystolic: Byte-crawling unary systolic array
D Wu, J San Miguel - 2022 IEEE International Symposium on …, 2022 - ieeexplore.ieee.org
General matrix multiply (GEMM) is an important operation in broad applications, especially
the thriving deep neural networks. To achieve low power consumption for GEMM …
the thriving deep neural networks. To achieve low power consumption for GEMM …