[PDF][PDF] On-the-fly detection of data races for programs with nested fork-join parallelism

J Mellor-Crummey - Proceedings of the 1991 ACM/IEEE Conference on …, 1991 - dl.acm.org
Detecting data races in shared-memory parallel programs is an important debugging
problem. This paper presents a new protocol for run-time detection of data races in …

Biased voting: A method for simulating CMOS bridging faults in the presence of variable gate logic thresholds

PC Maxwell, RC Aitken - Proceedings of IEEE International Test …, 1993 - ieeexplore.ieee.org
In order to simulate the effects of bridging faults correctly it is necessary to take into account
the fact that not all gate inputs have the same logic threshold. This paper presents a general …

Creating small fault dictionaries [logic circuit fault diagnosis]

B Chess, T Larrabee - … on Computer-Aided Design of Integrated …, 1999 - ieeexplore.ieee.org
Diagnostic fault simulation can generate enormous amounts of data. The techniques used to
manage this data can have significant effect on the outcome of the fault diagnosis …

Beyond the byzantine generals: Unexpected behavior and bridging fault diagnosis

DB Lavo, T Larrabee, B Chess - Proceedings International Test …, 1996 - ieeexplore.ieee.org
Physical defects cause behaviors unmodeled by even the best fault simulators, which
complicates predictive diagnosis. This paper reports on a diagnosis procedure that uses …

Resistive bridge fault modeling, simulation and test generation

VR Sar-Dessai, DMH Walker - International Test Conference …, 1999 - ieeexplore.ieee.org
In this work/sup 1/we develop models of resistive bridging faults and study the fault coverage
on ISCAS85 circuits of different test sets using resistive and zero-ohm bridges at different …

Fault model evolution for diagnosis: Accuracy vs. precision

JM Acken, SD Millman - Custom integrated circuits conference, 1992 - ieeexplore.ieee.org
This paper describes the evolution of accurate fault models, especially with respect to
integrated circuit diagnosis. The difference between accuracy and precision is described …

Fast and accurate CMOS bridging fault simulation

J Rearick, JH Patel - Proceedings of IEEE International Test …, 1993 - ieeexplore.ieee.org
This paper identifies the two key factors involved in obtaining accurate bridging fault
simulation results and presents a hybrid technique that maximizes both the speed and …

Finding defects with fault models

RC Aitken - Proceedings of 1995 IEEE International Test …, 1995 - ieeexplore.ieee.org
A process is presented to validate fault models used in fault diagnosis. Known defects are
inserted, using a focused ion beam (FIB), into production ICs and their behavior is compared …

Parallel X-fault simulation with critical path tracing technique

R Ubar, S Devadze, J Raik… - 2010 Design, Automation …, 2010 - ieeexplore.ieee.org
In this paper, a new very fast fault simulation method to handle the X-fault model is
proposed. The method is based on a two-phase procedure. In the first phase, a parallel …

An accurate bridging fault test pattern generator

SD Millman, JP Garvey Sr - Proceedings of the IEEE International Test …, 1991 - dl.acm.org
An Accurate Bridging Fault Test Pattern Generator | Proceedings of the IEEE International Test
Conference on Test: Faster, Better, Sooner skip to main content ACM Digital Library home …