The challenges and emerging technologies for low-power artificial intelligence IoT systems

L Ye, Z Wang, Y Liu, P Chen, H Li… - … on Circuits and …, 2021 - ieeexplore.ieee.org
The Internet of Things (IoT) is an interface with the physical world that usually operates in
random-sparse-event (RSE) scenarios. This article discusses main challenges of IoT chips …

11-bit column-parallel single-slope ADC with first-step half-reference ramping scheme for high-speed CMOS image sensors

HJ Kim - IEEE Journal of Solid-State Circuits, 2021 - ieeexplore.ieee.org
A first-step half-reference ramping (FHR) readout scheme is presented in this study for high
frame rate CMOS image sensors (CISs). The proposed readout scheme enhances the …

A single slope ADC with row-wise noise reduction technique for CMOS image sensor

K Nie, W Zha, X Shi, J Li, J Xu… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
This paper presents a novel technique for single slope analog to digital converter (SSADC)
to suppress the rowwise noise in CMOS image sensor. A sample switch is used in the …

A vision chip with complementary pathways for open-world sensing

Z Yang, T Wang, Y Lin, Y Chen, H Zeng, J Pei, J Wang… - Nature, 2024 - nature.com
Image sensors face substantial challenges when dealing with dynamic, diverse and
unpredictable scenes in open-world applications. However, the development of image …

2μs row time 12-bit column-parallel single slope ADC for high-speed CMOS image sensor

G Wang, Q Chen, J Xu, K Nie - Microelectronics Journal, 2023 - Elsevier
To improve the conversion speed of single-slope (SS) analog-to-digital converter (ADC) for
high frame rate CMOS image sensor, a cycle time-to-digital converter (TDC)-based readout …

Design of an always-on image sensor using an analog lightweight convolutional neural network

J Choi, S Lee, Y Son, SY Kim - Sensors, 2020 - mdpi.com
This paper presents an always-on Complementary Metal Oxide Semiconductor (CMOS)
image sensor (CIS) using an analog convolutional neural network for image classification in …

A low-power 65/14nm stacked cmos image sensor

M Kwon, S Lim, H Lee, IS Ha, MY Kim… - … on Circuits and …, 2020 - ieeexplore.ieee.org
This paper presents a low-power stacked CMOS image sensor (CIS) in 65/14nm process.
With 14nm process, we could achieve 29% less power consumption than the conventional …

A 63.2 μW 11-bit column parallel single-slope ADC with power supply noise suppression for CMOS image sensors

J Wei, X Li, L Sun, D Li - 2020 IEEE International Symposium …, 2020 - ieeexplore.ieee.org
A low power column parallel single-slope ADC with power supply noise suppression for
CMOS image sensors is proposed. The ADC is composed of a dynamic bias comparator …

A low noise and linearity improvement CMOS image sensor for surveillance camera with skew-relaxation local multiply circuit and on-chip testable ramp generator

W Saito, Y Iizuka, N Kato, R Otake… - 2021 IEEE Asian Solid …, 2021 - ieeexplore.ieee.org
CMOS Image Sensors (CIS) are extensively used in the field of industries, surveillance,
human identification, Time-of-Flight (ToF) sensor for ranging [1], capsule endoscope for …

A compressive sensing CMOS image sensor with partition sampling technique

H Lee, WT Kim, J Kim, M Chu… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
A CMOS image sensor (CIS) that performs compressive sensing (CS) image encoding
without compromising the operating speed and hardware complexity is presented in this …