Sub-THz/THz interconnect, complement to electrical and optical interconnects: Addressing fundamental challenges related to communication distances
QJ Gu - IEEE Solid-State Circuits Magazine, 2020 - ieeexplore.ieee.org
The big data era has witnessed expansion of information traffic at a 26% compound annual
growth rate (CAGR) during one decade, as shown in Figure 1 (a)[1],[2]. Rising data rates …
growth rate (CAGR) during one decade, as shown in Figure 1 (a)[1],[2]. Rising data rates …
Integrated electrical silicon interconnects for short-range high-speed millimeter-wave and terahertz communications
Millimeter-wave and terahertz interconnects implemented in advanced complementary
metal oxide semiconductor (CMOS) technologies have emerged as promising solutions to …
metal oxide semiconductor (CMOS) technologies have emerged as promising solutions to …
A 0.85-pJ/b 16-Gb/s/Pin Single-Ended Transmitter With Integrated Voltage Modulation for Low-Power Memory Interfaces
A single-ended transmitter achieves low power consumption with an integrated voltage
modulation (IVM) scheme for memory interfaces. The transmitter preserves the power …
modulation (IVM) scheme for memory interfaces. The transmitter preserves the power …
Data-dependent selection of amplitude and phase equalization in a quarter-rate transmitter for memory interfaces
We combine 2-tap feed-forward amplitude equalization with phase equalization by 4-tap
integrated pulse-width modulation. In a V SS-terminated transmitter, amplitude equalization …
integrated pulse-width modulation. In a V SS-terminated transmitter, amplitude equalization …
A 2.1-Gb/s 12-channel transmitter with phase emphasis embedded serializer for 55-in UHD intra-panel interface
Phase and amplitude emphasis are combined in a 2.1-Gb/s 12-channel transmitter for ultra-
high definition (UHD) intra-panel interface. The transmitter performs phase emphasis within …
high definition (UHD) intra-panel interface. The transmitter performs phase emphasis within …
A 0.5-to-0.9 V, 3-to-16Gb/s, 1.6-to-3.1 pJ/b wireline transceiver equalizing 27dB loss at 10Gb/s with clock-domain encoding using integrated pulse-width modulation …
A Ramachandran, T Anand - 2018 IEEE International Solid …, 2018 - ieeexplore.ieee.org
Improving the energy efficiency of wireline interconnects has become a necessity to sustain
growing data rates. Low-voltage wireline link operation is a promising approach to achieve …
growing data rates. Low-voltage wireline link operation is a promising approach to achieve …
An automated SerDes frontend generator verified with a 16-nm instance achieving 15 Gb/s at 1.96 pJ/bit
In this letter, we present the design methodology embedded within a SerDes frontend
generator along with experimental results from an instance produced in TSMC 16 nm. A …
generator along with experimental results from an instance produced in TSMC 16 nm. A …
A Single-Ended Impedance-Matched Transmitter With Single Ring-Oscillator-Based Time-Domain ZQ Calibration for Memory Interfaces
The proposed single-ended transmitter for memory interfaces is an impedance-matched
transmitter that utilizes a single ring-oscillator-based time-domain ZQ calibration. This ZQ …
transmitter that utilizes a single ring-oscillator-based time-domain ZQ calibration. This ZQ …
High data rate DMT SERDES design
Z Jiang - 2022 - repository.library.carleton.ca
The research presented in this thesis involves implementing a high data rate wireline com-
munications system using Discrete Multitone (DMT) transmission. A theoretical analysis of …
munications system using Discrete Multitone (DMT) transmission. A theoretical analysis of …
A 0.0071-mm2 10.8pspp-Jitter 4 to 10-Gb/s 5-Tap Current-Mode Transmitter Using a Hybrid Delay Line for Sub-1-UI Fractional De-Emphasis
This paper proposes an ultra-compact 4 to 10-Gb/s 5-tap current-mode transmitter to realize
the sub 1-TiI fractional de-emphasis (DE) using a hybrid delay line, which is alternatively …
the sub 1-TiI fractional de-emphasis (DE) using a hybrid delay line, which is alternatively …