Abstract cvc5 is the latest SMT solver in the cooperating validity checker series and builds
on the successful code base of CVC4. This paper serves as a comprehensive system …

The interfaces between layers of a system are susceptible to bugs if developers of adjacent
layers proceed under subtly different assumptions. Formal verification of two layers against …

Verification of program safety is often reducible to proving the unsatisfiability (ie, validity) of a
formula in Satisfiability Modulo Theories (SMT): Boolean logic combined with theories that …

A program verifier produces reliable results only if both the logic used to justify the program's
correctness is sound, and the implementation of the program verifier is itself correct …

Modern SAT solvers can emit independently-checkable proof certificates to validate their
results. The state-of-the-art proof system that allows for compact proof certificates is …

TLA+ is a language for formal specification of all kinds of computer systems. System
designers use this language to specify concurrent, distributed, and fault-tolerant protocols …

Proof production for SMT solvers is paramount to ensure their correctness independently
from implementations, which are often prohibitively difficult to verify. Historically, however …

Theorem proving is an important challenge for large language models (LLMs), as formal
proofs can be checked rigorously by proof assistants such as Lean, leaving no room for …

Modern SAT solvers can emit independently checkable proof certificates to validate their
results. The state-of-the-art proof system that allows for compact proof certificates is …

Recent advances in concurrent separation logic enabled the formal verification of
increasingly sophisticated fine-grained (ie, lock-free) concurrent programs. For such …