Packaging is a core technology to leverage the functions and the performances of micro-and
nano-structures in a system. In order to bring them to application, the gap between …

Three dimensional (3D) integration offers numerous electrical advantages like shorter
interconnection distances between different dies in the stack, reduced signal delay, reduced …

The major challenges facing the 21st century world demands disruptive technology based
solutions. One of the most promising exponential technology set to address world …

We have developed a new 3-D hybrid integration technology of complementary metal-oxide-
semiconductors, microelectromechanical systems (MEMS), and photonics circuits for …

The available options in 3D IC design and manufacturing have different impact on the cost of
a 3D System-on-Chip. Using the 3D cost model developed at IMEC, the cost of different …

This paper describes the architecture, design, analysis, and simulation and measurement
results of the 3D-MAPS (3D massively parallel processor with stacked memory) chip built …

Silicon nanowire (SiNW) field effect transistors (FETs) have been widely investigated as
biological sensors for their remarkable sensitivity due to their large surface to volume ratio …

Moore's law has provided a metronome for semiconductor technology over the past four
decades. However, when CMOS transistor feature size and interconnect dimensions …

We proposed 3D heterogeneous opto-electronic integration technology for system-on-
silicon (SOS). In order to realize 3D opto-electronic integrated system-on-silicon (SOS), we …

This brief presents a simultaneous bidirectional capacitive coupling transceiver for intertier
communication in 3-D integrated circuits. A novel capacitive coupling interconnect structure …