Simodense: a RISC-V softcore optimised for exploring custom SIMD instructions

P Papaphilippou, KP HJ, W Luk - 2021 31st International …, 2021 - ieeexplore.ieee.org
Simodense is a high-performance open-source RISC-V (RV32IM) softcore, optimised for
exploring custom SIMD instructions. In order to maximise SIMD instruction performance, the …

Extending the RISC-V ISA for exploring advanced reconfigurable SIMD instructions

P Papaphilippou, PHJ Kelly, W Luk - arXiv preprint arXiv:2106.07456, 2021 - arxiv.org
This paper presents a novel, non-standard set of vector instruction types for exploring
custom SIMD instructions in a softcore. The new types allow simultaneous access to a …

VxH: A Systematic Determination of Efficient Hierarchical Voxel Structures

M Rifai, L Johnsson - ACM Transactions on Spatial Algorithms and …, 2023 - dl.acm.org
Three-dimensional (3D) maps with many millions to billions of points are now used in an
increasing number of applications, with processing rates in the hundreds of thousands to …

Accelerators in Embedded Systems for Machine Learning: A RISCV View

A Sanchez-Flores, L Alvarez… - 2023 38th Conference …, 2023 - ieeexplore.ieee.org
Embedded systems, which are mobile systems with IoT and constrained processing
capability, have mostly functioned as a depiction of ubiquitous computing throughout the …

[PDF][PDF] DESIGNING AN EFFICIENT HARDWARE ACCELERATOR FOR DATA SORTING INTEGRATED WITH A RISC-V

KG Mohan, J Augustine, S Kumar - ijcse.com
In microprocessor architecture, amid a few blocks outcome of the optimized sorting algorithm
has proved its impact on the results. Sorters can be implemented in domains that includes …