Clio: A hardware-software co-designed disaggregated memory system
Memory disaggregation has attracted great attention recently because of its benefits in
efficient memory utilization and ease of management. So far, memory disaggregation …
efficient memory utilization and ease of management. So far, memory disaggregation …
User interface system, method, and computer program product
MS Smith - US Patent 9,417,754, 2016 - Google Patents
A system, method, and computer program product are provided for a touch or pressure
signal-based interface. In operation, a touch or pressure signal is received in association …
signal-based interface. In operation, a touch or pressure signal is received in association …
Efficient virtual memory for big memory servers
Our analysis shows that many" big-memory" server workloads, such as databases, in-
memory caches, and graph analytics, pay a high cost for page-based virtual memory. They …
memory caches, and graph analytics, pay a high cost for page-based virtual memory. They …
Coordinated and efficient huge page management with ingens
Modern computing is hungry for RAM, with today's enormous capacities eagerly consumed
by diverse workloads. Hardware address translation overheads have grown with memory …
by diverse workloads. Hardware address translation overheads have grown with memory …
[图书][B] Design of the RISC-V instruction set architecture
AS Waterman - 2016 - search.proquest.com
The hardware-software interface, embodied in the instruction set architecture (ISA), is
arguably the most important interface in a computer system. Yet, in contrast to nearly all …
arguably the most important interface in a computer system. Yet, in contrast to nearly all …
{AMD} prefetch attacks through power and time
Modern operating systems fundamentally rely on the strict isolation of user applications from
the kernel. This isolation is enforced by the hardware. On Intel CPUs, this isolation has been …
the kernel. This isolation is enforced by the hardware. On Intel CPUs, this isolation has been …
Colt: Coalesced large-reach tlbs
Translation Look aside Buffers (TLBs) are critical to system performance, particularly as
applications demand larger working sets and with the adoption of virtualization. Architectural …
applications demand larger working sets and with the adoption of virtualization. Architectural …
Mosaic: a GPU memory manager with application-transparent support for multiple page sizes
R Ausavarungnirun, J Landgraf, V Miller… - Proceedings of the 50th …, 2017 - dl.acm.org
Contemporary discrete GPUs support rich memory management features such as virtual
memory and demand paging. These features simplify GPU programming by providing a …
memory and demand paging. These features simplify GPU programming by providing a …
Redundant memory mappings for fast access to large memories
Page-based virtual memory improves programmer productivity, security, and memory
utilization, but incurs performance overheads due to costly page table walks after TLB …
utilization, but incurs performance overheads due to costly page table walks after TLB …
Pthammer: Cross-user-kernel-boundary rowhammer through implicit accesses
Rowhammer is a hardware vulnerability in DRAM memory, where repeated access to
memory can induce bit flips in neighboring memory locations. Being a hardware …
memory can induce bit flips in neighboring memory locations. Being a hardware …