Systematic formal verification for fault-tolerant time-triggered algorithms
J Rushby - IEEE Transactions on Software Engineering, 1999 - ieeexplore.ieee.org
Many critical real-time applications are implemented as time-triggered systems. We present
a systematic way to derive such time-triggered implementations from algorithms specified as …
a systematic way to derive such time-triggered implementations from algorithms specified as …
Formal verification for time-triggered clock synchronization
H Pfeifer, D Schwier… - … Computing for Critical …, 1999 - ieeexplore.ieee.org
Distributed dependable real time systems crucially depend on fault tolerant clock
synchronization. The paper reports on the formal analysis of the clock synchronization …
synchronization. The paper reports on the formal analysis of the clock synchronization …
NASA Langley's research and technology-transfer program in formal methods
RW Butler, JL Caldwell, VA Carreno… - … '95 Proceedings of …, 1995 - ieeexplore.ieee.org
This paper presents an overview of NASA Langley's research program in formal methods.
The major goals of this work are to make formal methods practical for use on life critical …
The major goals of this work are to make formal methods practical for use on life critical …
Formal specification and verification of a fault-masking and transient-recovery model for digital flight-control systems
J Rushby - Formal Techniques in Real-Time and Fault-Tolerant …, 1991 - Springer
We present a formal model for fault-masking and transient-recovery among the replicated
computers of digital flight-control systems. We establish conditions under which majority …
computers of digital flight-control systems. We establish conditions under which majority …
A formal model of asynchronous communication and its use in mechanically verifying a biphase mark protocol
JS Moore - Formal Aspects of Computing, 1994 - Springer
We present a formal model of asynchronous communication between two digital hardware
devices. The model takes the form of a function in the Boyer-Moore logic. The function …
devices. The model takes the form of a function in the Boyer-Moore logic. The function …
[图书][B] Verifiable computer security and hardware: Issues
WD Young - 1991 - cs.utexas.edu
This report explores the influences of hardware on verifiable secure system design and
envisions a mutually beneficial collaboration between the hardware verification and security …
envisions a mutually beneficial collaboration between the hardware verification and security …
Formal design and verification of a reliable computing platform for real-time control. Phase 2: Results
RW Butler, BL DiVito - 1992 - ntrs.nasa.gov
The design and formal verification of the Reliable Computing Platform (RCP), a fault tolerant
computing system for digital flight control applications is presented. The RCP uses N …
computing system for digital flight control applications is presented. The RCP uses N …
Formal techniques for synchronized fault-tolerant systems
BL Di Vito, RW Butler - Dependable Computing for Critical Applications 3, 1992 - Springer
We present the formal verification of synchronizing aspects of the Reliable Computing
Platform (RCP), a fault-tolerant computing system for digital flight control applications. The …
Platform (RCP), a fault-tolerant computing system for digital flight control applications. The …
Comparing verification systems: Interactive Consistency in ACL2
WD Young - IEEE Transactions on Software Engineering, 1997 - ieeexplore.ieee.org
Achieving interactive consistency among processors in the presence of faults is an important
problem in fault tolerant computing, first cleanly formulated by L. Lamport, R. Pease, and M …
problem in fault tolerant computing, first cleanly formulated by L. Lamport, R. Pease, and M …
Interaction of formal design systems in the development of a fault-tolerant clock synchronization circuit
PS Miner, S Pullela, SD Johnson - Proceedings of IEEE 13th …, 1994 - ieeexplore.ieee.org
We propose a design strategy that exploits the strengths of different formal approaches to
establish a reliable path from a mechanically verified high-level description to a concrete …
establish a reliable path from a mechanically verified high-level description to a concrete …