High capacity memory system with improved command-address and chip-select signaling mode

FA Ware, A Abhyankar, S Rajan - US Patent 10,223,299, 2019 - Google Patents
(57) ABSTRACT A memory controller and buffers on memory modules each operate in two
modes, depending on the type of mother board through which the controller and modules …

Memory core chip having TSVS

N Nishioka, S Narui - US Patent 10,916,489, 2021 - Google Patents
Disclosed herein is an apparatus that includes a memory cell army, a plurality of TSVs
penetrating a semiconductor chip, an output circuit configured to output a data to the TSVs …

TSV check circuit with replica path

H Makabe - US Patent 11,164,856, 2021 - Google Patents
Disclosed herein is an apparatus that includes a first semiconductor chip, first and second
TSVs penetrating the first semiconductor chip, a first path including the first TSV, a second …

TSV auto repair scheme on stacked die

N Nishioka - US Patent 10,930,363, 2021 - Google Patents
Disclosed herein is an apparatus that includes a first semi conductor chip having a plurality
of pad electrodes and a plurality of first latch circuits assigned to an associated one of the …

High capacity memory system with improved command-address and chip-select signaling mode

FA Ware, A Abhyankar, S Rajan - US Patent 10,642,762, 2020 - Google Patents
A memory controller and buffers on memory modules each operate in two modes,
depending on the type of motherboard through which the controller and modules are …

High capacity memory system with improved command-address and chip-select signaling mode

FA Ware, A Abhyankar, S Rajan - US Patent 11,899,597, 2024 - Google Patents
A memory controller and buffers on memory modules each operate in two modes,
depending on the type of motherboard through which the controller and modules are …

Memory core chip having TSVs

N Nishioka, S Narui - US Patent 11,244,888, 2022 - Google Patents
Disclosed herein is an apparatus that includes a memory cell array, a plurality of TSVs
penetrating a semiconductor chip, an output circuit configured to output a data to the TSVs …

TSV auto repair scheme on stacked die

N Nishioka - US Patent 11,380,414, 2022 - Google Patents
Disclosed herein is an apparatus that includes a first semiconductor chip having a plurality
of pad electrodes and a plurality of first latch circuits assigned to an associated one of the …

High capacity memory system with improved command-address and chip-select signaling mode

FA Ware, A Abhyankar, S Rajan - US Patent 11,243,897, 2022 - Google Patents
A memory controller and buffers on memory modules each operate in two modes,
depending on the type of motherboard through which the controller and modules are …

Semiconductor device and semiconductor system including the same

HO Lee - US Patent 10,942,674, 2021 - Google Patents
US10942674B2 - Semiconductor device and semiconductor system including the same -
Google Patents US10942674B2 - Semiconductor device and semiconductor system including …