A modern primer on processing in memory

O Mutlu, S Ghose, J Gómez-Luna… - … computing: from devices …, 2022 - Springer
Modern computing systems are overwhelmingly designed to move data to computation. This
design choice goes directly against at least three key trends in computing that cause …

Benchmarking a new paradigm: Experimental analysis and characterization of a real processing-in-memory system

J Gómez-Luna, I El Hajj, I Fernandez… - IEEE …, 2022 - ieeexplore.ieee.org
Many modern workloads, such as neural networks, databases, and graph processing, are
fundamentally memory-bound. For such workloads, the data movement between main …

CACTI 7: New tools for interconnect exploration in innovative off-chip memories

R Balasubramonian, AB Kahng… - ACM Transactions on …, 2017 - dl.acm.org
Historically, server designers have opted for simple memory systems by picking one of a few
commoditized DDR memory products. We are already witnessing a major upheaval in the off …

Processing data where it makes sense: Enabling in-memory computation

O Mutlu, S Ghose, J Gómez-Luna… - Microprocessors and …, 2019 - Elsevier
Today's systems are overwhelmingly designed to move data to computation. This design
choice goes directly against at least three key trends in systems that cause performance …

Rowhammer: A retrospective

O Mutlu, JS Kim - … Transactions on Computer-Aided Design of …, 2019 - ieeexplore.ieee.org
This retrospective paper describes the RowHammer problem in dynamic random access
memory (DRAM), which was initially introduced by Kim et al. at the ISCA 2014 Conference …

A survey on techniques for improving Phase Change Memory (PCM) lifetime

M Mohseni, AH Novin - Journal of Systems Architecture, 2023 - Elsevier
ABSTRACT PCMs are Non-Volatile Memories (NVMs) that store data using phase-change
semiconductors, such as silicon-chalcogenide glass. In addition to increased integration …

Evaluating STT-RAM as an energy-efficient main memory alternative

E Kültürsay, M Kandemir… - … Analysis of Systems …, 2013 - ieeexplore.ieee.org
In this paper, we explore the possibility of using STT-RAM technology to completely replace
DRAM in main memory. Our goal is to make STT-RAM performance comparable to DRAM …

Low-cost inter-linked subarrays (LISA): Enabling fast inter-subarray data movement in DRAM

KK Chang, PJ Nair, D Lee, S Ghose… - … Symposium on High …, 2016 - ieeexplore.ieee.org
This paper introduces a new DRAM design that enables fast and energy-efficient bulk data
movement across subarrays in a DRAM chip. While bulk data movement is a key operation …

Benchmarking a new paradigm: An experimental analysis of a real processing-in-memory architecture

J Gómez-Luna, IE Hajj, I Fernandez… - arXiv preprint arXiv …, 2021 - arxiv.org
Many modern workloads, such as neural networks, databases, and graph processing, are
fundamentally memory-bound. For such workloads, the data movement between main …

Understanding latency variation in modern DRAM chips: Experimental characterization, analysis, and optimization

KK Chang, A Kashyap, H Hassan, S Ghose… - Proceedings of the …, 2016 - dl.acm.org
Long DRAM latency is a critical performance bottleneck in current systems. DRAM access
latency is defined by three fundamental operations that take place within the DRAM cell …