MLCAD: A survey of research in machine learning for CAD keynote paper
Due to the increasing size of integrated circuits (ICs), their design and optimization phases
(ie, computer-aided design, CAD) grow increasingly complex. At design time, a large design …
(ie, computer-aided design, CAD) grow increasingly complex. At design time, a large design …
Machine learning for FPGA electronic design automation
A Biscontini, E Popovici, A Temko - IEEE Access, 2024 - ieeexplore.ieee.org
In the last decades, field-programmable gate arrays (FPGAs) have become increasingly
important to the electronics industry, offering higher performance and lower power …
important to the electronics industry, offering higher performance and lower power …
HECTOR: A multi-level intermediate representation for hardware synthesis methodologies
Hardware synthesis requires a complicated process to generate synthesizable register
transfer level (RTL) code. High-level synthesis tools can automatically transform a high-level …
transfer level (RTL) code. High-level synthesis tools can automatically transform a high-level …
An Efficient Reinforcement Learning Based Framework for Exploring Logic Synthesis
Y Qian, X Zhou, H Zhou, L Wang - ACM Transactions on Design …, 2024 - dl.acm.org
Logic synthesis is a crucial step in electronic design automation tools. The rapid
developments of reinforcement learning (RL) have enabled the automated exploration of …
developments of reinforcement learning (RL) have enabled the automated exploration of …
Respect: Reinforcement learning based edge scheduling on pipelined coral edge tpus
Deep neural networks (DNNs) have substantial computational and memory requirements,
and the compilation of its computational graphs has a great impact on the performance of …
and the compilation of its computational graphs has a great impact on the performance of …
Accelerating exact combinatorial optimization via rl-based initialization-a case study in scheduling
Scheduling on dataflow graphs (also known as computation graphs) is an NP-hard problem.
The traditional exact methods are limited by runtime complexity, while reinforcement …
The traditional exact methods are limited by runtime complexity, while reinforcement …
Exact memory-and communication-aware scheduling of dnns on pipelined edge tpus
Deep neural networks (DNNs) represent the state-of-the-art in many applications but have
substantial computational and memory requirements, which greatly limit their training and …
substantial computational and memory requirements, which greatly limit their training and …
A Systematic Analysis of Data Diversity in Machine Learning for EDA
J Ren - Proceedings of the 6th International Conference on …, 2023 - dl.acm.org
With the exponential growth of Very Large-Scale Integration (VLSI) scale and complexity,
traditional algorithms of Electronic Design Automation (EDA) are gradually encountering …
traditional algorithms of Electronic Design Automation (EDA) are gradually encountering …
[图书][B] Machine Learning for AI-Augmented Design Space Exploration of Computer Systems
J Kwon - 2022 - search.proquest.com
Advanced and emerging computer systems, ranging from supercomputers to embedded
systems, feature high performance, energy efficiency, acceleration, and specialization …
systems, feature high performance, energy efficiency, acceleration, and specialization …
[PDF][PDF] Trace-Based Learning for Agile Hardware Design and Design Automation
Y Zhou - 2021 - ecommons.cornell.edu
Modern computational platforms are becoming increasingly complex to meet the stringent
constraints on performance and power. With the larger design spaces and new design trade …
constraints on performance and power. With the larger design spaces and new design trade …