The present invention is directed generally to systems and methods which provide a
memory module having multiple data channels that are independently accessible (ie, a multi …

US8561037B2 - Compiler for generating an executable comprising instructions for a
plurality of different instruction sets - Google Patents US8561037B2 - Compiler for …

The present invention is directed to a system and method which employ two memory access
paths: 1) a cache-access path in which block data is fetched from main memory for loading …

Abstract Systems and methods which provide a modular processor framework and
instruction set architecture designed to efficiently execute applications whose memory …

A memory interleave system for providing memory interleave for a heterogeneous
computing system is provided. The memory interleave system effectively interleaves memory …

According to a first aspect, efficient data transfer operations can be achieved by: decoding
by a processor device, a single instruction specifying a transfer operation for a plurality of …

The present invention is directed to systems and methods for mapping a neighborhood of
data to general registers of a processing element. Embodiments of the present invention …

The present invention is directed generally to systems and methods which provide a
memory module having multiple data channels that are independently accessible (ie, a multi …

Embodiments of systems, apparatuses, and methods for per forming gather and scatter
stride instruction in a computer processor are described. In some embodiments, the …

According to one embodiment, a processor includes an instruction decoder to decode a first
instruction to gather data elements from memory, the first instruction having a first operand …