Field Programmable Gate Array (FPGA) is a general purpose programmable logic device
that can be configured by a customer after manufacturing to perform from a simple logic gate …

Abstract CAVLC (Context-Adaptive Variable Length Coding) is a high-performance entropy
method for video and image compression. It is the most commonly used entropy method in …

REMUS-II (REconfigurable MUltimedia System 2) is a coarse-grained dynamically
reconfigurable computing system for multimedia and communication baseband processing …

This brief presents an innovative high-speed context-adaptive variable-length encoder. First,
a direct forward algorithm rather than backward tracking is proposed to compute the coding …

In this paper, we propose a hardware architecture for the intra-coding module used in the H.
264 encoder. The proposed architecture is based on data-parallelism principles, with a 128 …

Rate distortion optimization (RDO) is the best known mode decision method, while the high
implementation complexity limits its applications and almost no real-time hardware encoder …

This paper discusses combined software and hardware architecture of a H. 264/AVC video
compression decoder. The software version of the decoder was implemented using NIOS II …

In this paper, we propose a real-time platform for the H. 264 CODEC with a memory
management method, in which we use a preloading mechanism in order to reduce access to …

REMUS is a coarse-grained dynamically reconfigurable computing system proposed for
multimedia and communication baseband processing applications. H. 264/AVC is the latest …

Xilinx System Generator is a Matlab/Simulink highlevel based design tool especially for the
development of complex digital circuits using Hardware Description Language (HDL). In this …