The need for ultra low-power, area efficient, and high speed analog-to-digital converters is
pushing toward the use of dynamic regenerative comparators to maximize speed and power …

A comparator in a low-power 65-nm complementary metal-oxide-semiconductor process
(only standard transistors with threshold voltage V t ap 0.4 V were used) is presented, where …

There is great attention to develop hardware accelerator with better energy efficiency, as
well as throughput, than GPUs for convolutional neural network (CNN). The existing …

This brief proposes a parallel path based strong-arm latch voltage comparator. The
proposed architecture improves the speed performance when compared to the conventional …

We present a three-stage triple-latch feedforward fully dynamic comparator, with an
achievable data rate of 13.5 Gb/s and a BER< 10− 12 for input amplitudes as small as 5 mV …

This paper proposes a mid-stage latch circuit to be employed in a high-speed comparator.
The advantages of the proposed circuit are low kickback noise and offset. Moreover, low …

This article presents a fully dynamic latched comparator with a high-gain three-stage
configuration and an extra parallel feed-forward path, able to achieve a delay of 26.8 ps and …

In this paper, an ultra high speed dynamic comparator is presented. The PMOS pass
transistors are used in the latch and pre-amplifier stage of the comparator. At the …

This paper presents a design for an on-chip high-speed clocked-comparator for high
frequency signal digitization. The comparator consists of two stages, amplification and …

Comparators are the core of analog-to-digital converters (ADC), used as sense amplifiers in
on-chip data-communication links and memories. The time taken by a clocked comparator to …