REVAMP: A systematic framework for heterogeneous CGRA realization

TK Bandara, D Wijerathne, T Mitra, LS Peh - Proceedings of the 27th …, 2022 - dl.acm.org
Coarse-Grained Reconfigurable Architectures (CGRAs) provide an excellent balance
between performance, energy efficiency, and flexibility. However, increasingly sophisticated …

Riptide: A programmable, energy-minimal dataflow compiler and architecture

G Gobieski, S Ghosh, M Heule, T Mowry… - 2022 55th IEEE/ACM …, 2022 - ieeexplore.ieee.org
Emerging sensing applications create an unprecedented need for energy efficiency in
programmable processors. To achieve useful multi-year deployments on a small battery or …

Chordmap: Automated mapping of streaming applications onto cgra

Z Li, D Wijerathne, X Chen… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
Streaming applications, consisting of several communicating kernels, are ubiquitous in the
embedded computing systems. The synchronous data flow (SDF) is commonly used to …

Boils: Bayesian optimisation for logic synthesis

A Grosnit, C Malherbe, R Tutunov… - … , Automation & Test …, 2022 - ieeexplore.ieee.org
Optimising the quality-of-results (QoR) of circuits during logic synthesis is a formidable
challenge necessitating the exploration of exponentially sized search spaces. While expert …

Lisa: Graph neural network based portable mapping on spatial accelerators

Z Li, D Wu, D Wijerathne, T Mitra - 2022 IEEE International …, 2022 - ieeexplore.ieee.org
Spatial accelerators, such as Coarse-Grained Reconfigurable Arrays (CGRA), provide a
promising pathway to scale the performance and power efficiency of computing systems …

Domain-specific architectures: Research problems and promising approaches

A Krishnakumar, U Ogras, R Marculescu… - ACM Transactions on …, 2023 - dl.acm.org
Process technology-driven performance and energy efficiency improvements have slowed
down as we approach physical design limits. General-purpose manycore architectures …

[PDF][PDF] Morpher: An open-source integrated compilation and simulation framework for cgra

D Wijerathne, Z Li, M Karunaratne… - Fifth Workshop on …, 2022 - woset-workshop.github.io
This paper presents Morpher, an open-source endto-end compilation and simulation
framework, to assist design space exploration and application-level developments of CGRA …

PANORAMA: Divide-and-conquer approach for mapping complex loop kernels on CGRA

D Wijerathne, Z Li, TK Bandara, T Mitra - … of the 59th ACM/IEEE Design …, 2022 - dl.acm.org
CGRAs are well-suited as hardware accelerators due to power efficiency and
reconfigurability. However, their potential is limited by the inability of the compiler to map …

Mapzero: Mapping for coarse-grained reconfigurable architectures with reinforcement learning and monte-carlo tree search

X Kong, Y Huang, J Zhu, X Man, Y Liu, C Feng… - Proceedings of the 50th …, 2023 - dl.acm.org
Coarse-grained reconfigurable architecture (CGRA) has become a promising candidate for
data-intensive computing due to its flexibility and high energy efficiency. CGRA compilers …

Coarse-Grained Reconfigurable Array (CGRA)

Z Li, D Wijerathne, T Mitra - Handbook of Computer Architecture, 2022 - Springer
Coarse-grained reconfigurable array (CGRA) is a promising class of spatial accelerator that
offers high performance, energy efficiency, as well as flexibility to support a wide range of …