Power-efficient sum of absolute differences hardware architecture using adder compressors for integer motion estimation design
Sum of absolute differences (SAD) calculation is one of the most time-consuming operations
of video encoders compatible with the high efficiency video coding standard. SAD hardware …
of video encoders compatible with the high efficiency video coding standard. SAD hardware …
Low-power and high-throughput approximated architecture for av1 fme interpolation
R Domanski, W Kolodziejski, G Correa… - … on circuits and …, 2021 - ieeexplore.ieee.org
Modern video encoders like the AOM Video 1 (AV1) implement several complex tools to
allow the required high level of compression efficiency. The Fractional Motion Estimation …
allow the required high level of compression efficiency. The Fractional Motion Estimation …
A parallel and pipelined hardware architecture for fractional-pixel motion estimation in avs3
The latest generation of video coding standards has significantly improved video coding
performance. The third generation of audio video coding standards (AVS3) is one of these …
performance. The third generation of audio video coding standards (AVS3) is one of these …
Approximate interpolation filters for the fractional motion estimation in HEVC encoders and their VLSI design
R Da Silva, Í Siqueira, M Grellert - … of the 32nd Symposium on Integrated …, 2019 - dl.acm.org
Motion Estimation (ME) is one of the most complex HEVC steps, consuming more than 60%
of the average encoding time, most of which is spent on its fractional part (Fractional Motion …
of the average encoding time, most of which is spent on its fractional part (Fractional Motion …
Learning-based bypass zone search algorithm for fast motion estimation
Video coding has been widely explored by academia and industry in recent years, mainly
due to the great popularization of video applications and multimedia-capable devices. The …
due to the great popularization of video applications and multimedia-capable devices. The …
LF-CAE: Context-adaptive encoding for lenslet light fields using HEVC
Light fields can outperform the representability of current imaging technologies by
considering the angle of light-rays striking in the camera in addition to the color information …
considering the angle of light-rays striking in the camera in addition to the color information …
Hardware design for the affine motion compensation of the vvc standard
The Affine Motion Estimation (AME) of the Versatile Video Coding (VVC) standard is a high-
complexity task. The AME requires Affine Motion Compensation (MC) to be performed for …
complexity task. The AME requires Affine Motion Compensation (MC) to be performed for …
Exploring high-order adder compressors for power reduction in sum of absolute differences architectures for real-time UHD video encoding
The sum of absolute difference (SAD) calculation is one of the most computing-intensive
operations in video encoders compatible with recent standards, such as high-efficiency …
operations in video encoders compatible with recent standards, such as high-efficiency …
Low-power and memory-aware approximate hardware architecture for fractional motion estimation interpolation on HEVC
Nowadays, current video coding standards like the High Efficiency Video Coding (HEVC)
implement several complex coding tools, like the Fractional Motion Estimation (FME). An …
implement several complex coding tools, like the Fractional Motion Estimation (FME). An …
Energy-efficient Hadamard-based SATD hardware architectures through calculation reuse
I Seidel, M Monteiro, B Bonotto… - … on Circuits and …, 2019 - ieeexplore.ieee.org
The Hadamard-based Sum of Absolute Transformed Differences (SATD) is a distortion
metric that correlates better with other video encoding steps than the commonly used Sum of …
metric that correlates better with other video encoding steps than the commonly used Sum of …