Ddr4-onfi ssd 1-to-n bus adaptation and expansion controller
X Lee - US Patent App. 14/656,451, 2015 - Google Patents
Inventor: Xiaobing LEE, Santa Clara, CA (US) An apparatus for communicating data
requests received by host devices using one DDR protocol to memory devices (21) Appl …
requests received by host devices using one DDR protocol to memory devices (21) Appl …
Nonvolatile memory module having dual-port DRAM
Y Cho - US Patent 9,767,903, 2017 - Google Patents
(57) ABSTRACT A memory module includes a nonvolatile memory device and a volatile
memory device connected to a first data channel through a first input/output port and to a …
memory device connected to a first data channel through a first input/output port and to a …
Solid-state mass storage device and method for persisting volatile data to non-volatile media
ND Horspool, JO Moore, J Margetts - US Patent 9,904,490, 2018 - Google Patents
A mass storage device and method for storing data originally written to a volatile memory
with byte level I/O protocol commands to a non-volatile memory using block level I/O …
with byte level I/O protocol commands to a non-volatile memory using block level I/O …
Synchronous dynamic random access memory (SDRAM) and memory controller device mounted in single system in package (SIP)
M Suwa, T Betsui - US Patent 9,990,981, 2018 - Google Patents
To provide an electronic device capable of improving a signal quality, the electronic device
includes a semiconductor memory device, a semiconductor device configured to access …
includes a semiconductor memory device, a semiconductor device configured to access …
Dual-precision analog memory cell and array
Z Lu, L Zhao - US Patent 11,069,391, 2021 - Google Patents
Dual-precision analog memory cells and arrays are provided. In some embodiments, a
memory cell, comprises a non-volatile memory element having an input terminal and at least …
memory cell, comprises a non-volatile memory element having an input terminal and at least …
Cpu package substrates with removable memory mechanical interfaces
M Prakash, TT Holden, JL Smalley… - US Patent App. 15 …, 2018 - Google Patents
Configurable central processing unit (CPU) package substrates are disclosed. A package
substrate is described that includes a processing device interface. The package substrate …
substrate is described that includes a processing device interface. The package substrate …
Synchronous dynamic random access memory (SDRAM) and memory controller device mounted in single system in package (SIP)
M Suwa, T Betsui - US Patent 10,460,792, 2019 - Google Patents
To provide an electronic device capable of improving a signal quality, the electronic device
includes a semiconductor memory device, a semiconductor device configured to access …
includes a semiconductor memory device, a semiconductor device configured to access …
Dual-precision analog memory cell and array
Z Lu, L Zhao - US Patent 11,887,645, 2024 - Google Patents
Dual-precision analog memory cells and arrays are provided. In some embodiments, a
memory cell, comprises a non-volatile memory element having an input terminal and at least …
memory cell, comprises a non-volatile memory element having an input terminal and at least …
Coordinated in-module RAS features for synchronous DDR compatible memory
A memory module includes a memory array, an interface and a controller. The memory array
includes an array of memory cells and is configured as a dual in-line memory module …
includes an array of memory cells and is configured as a dual in-line memory module …
Memory expansion card
B Keeth - US Patent 11,983,059, 2024 - Google Patents
The present disclosure includes apparatuses and methods related to a memory expansion
card suitable for, relative to other memory solutions, a high-speed interface and low power …
card suitable for, relative to other memory solutions, a high-speed interface and low power …