USER-SMILE: Ultrafast stimulus error removal and segmented model identification of linearity errors for ADC built-in self-test

T Chen, X Jin, RL Geiger… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
Linearity testing of analog-to-digital converters (ADCs) is very challenging and expensive
due to the stringent linearity requirement on the stimulus and the extremely long test time …

A simple algorithm for the estimation of phase difference between two sinusoidal voltages

NM Vucijak, LV Saranovac - IEEE Transactions on …, 2010 - ieeexplore.ieee.org
A simple algorithm (SAL) and a modified SAL (MSAL) for the estimation of the phase
difference between two sine-wave signals are proposed. The results obtained by SAL and …

Algorithm for dramatically improved efficiency in ADC linearity test

Z Yu, D Chen - 2012 IEEE International Test Conference, 2012 - ieeexplore.ieee.org
For high performance analog and mixed-signal products, production test is a significant
contributor to the recurring manufacturing cost. For high resolution ADCs, the cost of build …

Several approaches to ADC transfer function approximation and their application for ADC non-linearity correction

P Suchanek, D Slepicka, V Haasz - Metrology and Measurement Systems, 2008 - infona.pl
The performance of current electronic devices is mostly limited by analog front-end and
analog-to-digital converter's (ADC) actual parameters. One of the most important parameters …

An efficient pre-processing scheme to enhance resolution in band-pass signals acquisition

L Angrisani, M D'Arco, G Ianniello… - IEEE Transactions on …, 2012 - ieeexplore.ieee.org
The paper presents a pre-processing scheme to enhance the resolution of data acquisition
systems (DASs) in the presence of band-pass input signals. The proposed solution permits …

Unified ADC nonlinearity error model for SAR ADC

L Michaeli, P Michalko, J Šaliga - Measurement, 2008 - Elsevier
The paper introduces a new ADC static nonlinearity model focusing on SAR ADC which is
labelled the unified ADC nonlinearity error model. The model can also cover any other ADC …

Fast ADC testing by repetitive histogram analysis

AC Serra, F Alegria, L Michaeli… - 2006 IEEE …, 2006 - ieeexplore.ieee.org
Modeling the integral nonlinearity by the unified behavioral error model which is expressed
as one dimensional image in the code k domain requires a minimal number of error …

Ultrafast stimulus error removal algorithm for ADC linearity test

T Chen, D Chen - 2015 IEEE 33rd VLSI Test Symposium (VTS), 2015 - ieeexplore.ieee.org
Linearity test of an analog-to-digital converter (ADC) can be very challenging because it
requires a signal generator substantially more linear than the ADC under test. For high …

A reduced-code method for integral nonlinearity testing in DACs

P Daponte, L De Vito, G Iadarola, S Rapuano - Measurement, 2021 - Elsevier
This paper proposes an innovative method for Integral Nonlinearity (INL) testing, that allows
to measure the voltage corresponding only to a subset of all the codes of Digital-to-Analog …

Statistical neural network (SNN) for predicting signal-to-noise ratio (SNR) from static parameters and its validation in 16-bit, 125-MSPS analog-to-digital converters …

L Hou, Y Liu, W Xie, Z Dai, W Yang… - Review of Scientific …, 2022 - pubs.aip.org
In the analog-to-digital converter (ADC) test process, the static and dynamic performance
parameters are the most important, and the tests for these parameters account for the bulk of …