Ultra-low-power and stable 10-nm FinFET 10T sub-threshold SRAM
This paper explores an ultra-low-power 10T subthreshold SRAM with high stabilities based
on 10-nm FinFETs. To prove the superiority of the proposed 10T SRAM's performance, a …
on 10-nm FinFETs. To prove the superiority of the proposed 10T SRAM's performance, a …
A review on SRAM memory design using FinFET technology
TV Lakshmi, M Kamaraju - International Journal of System Dynamics …, 2021 - igi-global.com
An innovative technology named FinFET (Fin Field Effect Transistor) has been developed to
offer better transistor circuit design and to compensate the necessity of superior storage …
offer better transistor circuit design and to compensate the necessity of superior storage …
A comprehensive analysis of different SRAM cell topologies in 7-nm FinFET technology
Complementary metal-oxide-semiconductor (CMOS) device faces various unknown short
channel effects (SCEs) such as subthreshold leakage and drain-induced barrier lowering …
channel effects (SCEs) such as subthreshold leakage and drain-induced barrier lowering …
Design of Enhanced Reversible 9T SRAM Design for the Reduction in Sub-threshold Leakage Current with14nm FinFET Technology
P Praveen, RK Singh - ACM Transactions on Design Automation of …, 2023 - dl.acm.org
Power dissipation is considered one of the important issues in low power Very-large-scale
integration (VLSI) circuit design and is related to the threshold voltage. Generally, the sub …
integration (VLSI) circuit design and is related to the threshold voltage. Generally, the sub …
Design of highly stable, high speed and low power 10T SRAM cell in 18-nm FinFET technology
Many scientists are working to develop a static random-access memory (SRAM) cell that
used little power and has good stability and speed. This work introduces a fin field effect …
used little power and has good stability and speed. This work introduces a fin field effect …
[HTML][HTML] Design of improved write and read performance 12T sram cell with leakage power control technique
M Srinu, ES Rao, PC Sekhar - e-Prime-Advances in Electrical Engineering …, 2024 - Elsevier
Currently, memory occupies nearly eighty-five percent of the allocated chip area. Integrated
electronics, such as workstations and mobile gadgets, need quick memory systems that use …
electronics, such as workstations and mobile gadgets, need quick memory systems that use …
Design and mathematical analysis of a 7t sram cell with enhanced read snm using pmos as an access transistor
Purpose This work is proposed for low power energy-efficient applications like laptops,
mobile phones, and palmtops. In this study, P-channel metal–oxide–semiconductor …
mobile phones, and palmtops. In this study, P-channel metal–oxide–semiconductor …
A 9T FinFET SRAM cell for ultra-low power application in the subthreshold regime
Due to the scaling of the CMOS, the limitations of these devices raised the need for
alternative nano-devices. Various devices are proposed like FinFET, TFET, CNTFET. Among …
alternative nano-devices. Various devices are proposed like FinFET, TFET, CNTFET. Among …
Literature review of the SRAM circuit design challenges
The majority of current embedded systems use microprocessors equipped with volatile
cache memory based on static random access memory (SRAM) technology. As part of a …
cache memory based on static random access memory (SRAM) technology. As part of a …
Low-power memory design for IoT-enabled systems: Part 2
The basic IoT architecture has various sub-systems such as applications, gateways,
processors and sensors. These sub-systems require low power and high speed memories …
processors and sensors. These sub-systems require low power and high speed memories …