Reed-Solomon coding algorithms based on Reed-Muller transform for any number of parities
Based on the Reed-Muller (RM) transform, this paper proposes a Reed-Solomon (RS)
encoding/erasure decoding algorithm for any number of parities. Specifically, we first …
encoding/erasure decoding algorithm for any number of parities. Specifically, we first …
A Flexible Hardware Accelerator for Booth Polynomial Multiplier
OS Sonbul - Applied Sciences, 2024 - mdpi.com
This article presents a parameterized/flexible hardware accelerator design tailored for the
Booth polynomial multiplication method. The flexibility is achieved by allowing users to …
Booth polynomial multiplication method. The flexibility is achieved by allowing users to …
A low power hard decision decoder for BCH codes
P Garlapati, B Yamuna… - … on Advances in …, 2021 - ieeexplore.ieee.org
In decoding of Bose-Chaudhuri-Hocquenghem codes, Peterson's algorithm is more efficient
for codes with single, double and triple error correcting capabilities. Numerous methods …
for codes with single, double and triple error correcting capabilities. Numerous methods …
An efficient reconfigurable encoder for the IEEE 1901 standard
Y Chen, H Cui, Z Wang - … on Very Large Scale Integration (VLSI …, 2022 - ieeexplore.ieee.org
The IEEE 1901 standard for power line communication (PLC) enables simple connection
among Internet of Things devices. The forward error correction (FEC) codes specified in the …
among Internet of Things devices. The forward error correction (FEC) codes specified in the …
VLSI Implementation of Turbo Product Code
N Varghese, S Murugan - 2021 Second International …, 2021 - ieeexplore.ieee.org
Turbo product code (TPC) is a special type of parallel concatenation of convolution codes.
The length of convolution code can be altered using TPC. They can be used as forward error …
The length of convolution code can be altered using TPC. They can be used as forward error …