Ingredients of adaptability: a survey of reconfigurable processors
A Chattopadhyay - VLSI Design, 2013 - Wiley Online Library
For a design to survive unforeseen physical effects like aging, temperature variation, and/or
emergence of new application standards, adaptability needs to be supported. Adaptability …
emergence of new application standards, adaptability needs to be supported. Adaptability …
Automated formal verification of processors based on architectural models
U Kühne, S Beyer, J Bormann… - Formal Methods in …, 2010 - ieeexplore.ieee.org
To keep up with the growing complexity of digital systems, high level models are used in the
design process. In today's processor design, a comprehensive tool chain can be built …
design process. In today's processor design, a comprehensive tool chain can be built …
[图书][B] Language-driven exploration and implementation of partially re-configurable ASIPs
Increasing complexity of modern embedded systems demands system designers to ramp up
their design productivity without compromising performance goals. This is promoted by …
their design productivity without compromising performance goals. This is promoted by …
[PDF][PDF] Complete formal verification of a family of automotive DSPs
R Baranowski, M Trunzer - Proc. Design Verification Conf …, 2016 - dvcon-proceedings.org
Formal verification becomes the method of choice for designs with stringent quality
requirements. For complex architectures with many implementation alternatives, however …
requirements. For complex architectures with many implementation alternatives, however …
Verification of a risc processor ip core using systemverilog
R Sethulekshmi, S Jazir, RA Rahiman… - 2016 International …, 2016 - ieeexplore.ieee.org
This paper describes a SystemVerilog Open Verification Methodology (OVM) for a 32 bit
RISC processor IP core. For verification process a configurable and extensible test-bench is …
RISC processor IP core. For verification process a configurable and extensible test-bench is …
[PDF][PDF] Compiler backend generation from structural processor models
F Brandner - 2009 - perso.telecom-paristech.fr
In den letzten Jahren konnte im Bereich der eingebetteten Computersysteme eine rasante
Entwicklung beobachtet werden. Prozessoren, die in diesen Systemen eingesetzt werden …
Entwicklung beobachtet werden. Prozessoren, die in diesen Systemen eingesetzt werden …
[PDF][PDF] Entwurfsraumexploration ressourceneffizienter VLIW-Prozessoren
T Jungeblut - 2011 - core.ac.uk
Zusammenfassung Die zunehmende Miniaturisierung digitaler Schaltkreise durch moderne
Fertigungsverfahren und die damit verbundene steigende Integrationsdichte von …
Fertigungsverfahren und die damit verbundene steigende Integrationsdichte von …
Optimization of an application specific instruction set processor using application description language
Application Specific Instruction Set Processor (ASIP) is becoming essential to convergent
System on Chip (SoC) Design. Usually there are two approaches to design an ASIP. One of …
System on Chip (SoC) Design. Usually there are two approaches to design an ASIP. One of …
Architecture Description Languages
Designing a processor is an arduous task. It involves not only defining the instruction-set
architecture but also the various processor development tools such as compiler, instruction …
architecture but also the various processor development tools such as compiler, instruction …