Problems and challenges of emerging technology networks− on− chip: A review
AB Achballah, SB Othman, SB Saoud - Microprocessors and Microsystems, 2017 - Elsevier
Abstract Networks− on− chip (NoC) are an alternative to alleviate the problems of legacy
interconnect fabrics. However, many emerging technology NoC are developed and are now …
interconnect fabrics. However, many emerging technology NoC are developed and are now …
Energy-efficient networks-on-chip architectures: Design and run-time optimization
Abstract Networks-on-Chip (NoC) architectures have become the mainstream
communication backbone of high-end processors and systems-on-chip (SoCs) after their …
communication backbone of high-end processors and systems-on-chip (SoCs) after their …
On-chip networks from a networking perspective: Congestion and scalability in many-core interconnects
In this paper, we present network-on-chip (NoC) design and contrast it to traditional network
design, highlighting similarities and differences between the two. As an initial case study, we …
design, highlighting similarities and differences between the two. As an initial case study, we …
Understanding and improving the latency of DRAM-based memory systems
KK Chang - 2017 - search.proquest.com
Over the past two decades, the storage capacity and access bandwidth of main memory
have improved tremendously, by 128x and 20x, respectively. These improvements are …
have improved tremendously, by 128x and 20x, respectively. These improvements are …
A heterogeneous multiple network-on-chip design: an application-aware approach
Current network-on-chip designs in chip-multiprocessors are agnostic to application
requirements and hence are provisioned for the general case, leading to wasted energy and …
requirements and hence are provisioned for the general case, leading to wasted energy and …
Plasticity-on-chip design: Exploiting self-similarity for data communications
With the increasing demand for distributed big data analytics and data-intensive programs
which contribute to large volumes of packets among processing elements (PEs) and …
which contribute to large volumes of packets among processing elements (PEs) and …
Burst-tolerant datacenter networks with vertigo
Microsecond-scale congestion events, known as microbursts, are a main cause of packet
loss and poor application performance in today's datacenters. Given the low network …
loss and poor application performance in today's datacenters. Given the low network …
HAT: Heterogeneous adaptive throttling for on-chip networks
KKW Chang, R Ausavarungnirun… - 2012 IEEE 24th …, 2012 - ieeexplore.ieee.org
The network-on-chip (NoC) is a primary shared resource in a chip multiprocessor (CMP)
system. As core counts continue to increase and applications become increasingly data …
system. As core counts continue to increase and applications become increasingly data …
Upward packet popup for deadlock freedom in modular chiplet-based systems
Monolithic SoCs can be decomposed into disparate chiplets that support integration with
advanced pack-aging technologies. This concept is promising in reducing the manufacturing …
advanced pack-aging technologies. This concept is promising in reducing the manufacturing …
Slim noc: A low-diameter on-chip network topology for high energy efficiency and scalability
Emerging chips with hundreds and thousands of cores require networks with unprecedented
energy/area efficiency and scalability. To address this, we propose Slim NoC (SN): a new on …
energy/area efficiency and scalability. To address this, we propose Slim NoC (SN): a new on …