[PDF][PDF] Design and analysis of hetero dielectric dual material gate underlap spacer tunnel field effect transistor

S Howldar, B Balaji, K Srinivasa Rao - International Journal of Engineering …, 2023 - ije.ir
This paper presents a design and analysis of a Hetero Dielectric Dual Material Gate
Underlap Spacer Tunnel Field Effect Transistor, aiming to enhance device performance and …

Noise behavior of vertical tunnel FETs under the influence of interface trap states

VD Wangkheirakpam, B Bhowmick… - Microelectronics …, 2021 - Elsevier
A detailed analysis of low frequency noise behavior of two different vertical TFETs namely
n​+​ pocket VTFET and dual MOS capacitor (D-MOS) VTFET is presented in this work …

Gate Oxide Thickness and Drain Current Variation of Dual Gate Tunnel Field Effect Transistor

S Howldar, B Balaji, K Srinivasa Rao - International Journal of Engineering, 2024 - ije.ir
Two-dimensional analytical modelling of Dual Material Gate Tunnel Field Effect Transistor
with change in variation of gate oxide thickness (DMG-UOX-TFET) is proposed in this work …

Performance investigation of elevated source EBG TFET based photosensor for near-infrared light sensing applications

T Ashok, CK Pandey - Micro and Nanostructures, 2024 - Elsevier
In this manuscript, an elevated source TFET with extended back gate (ES-EBG-TFET) based
photosensor is designed to offer improvement in optical performance for detecting incident …

Investigation and Analysis of Dual Metal Gate Overlap on Drain Side Tunneling Field Effect Transistor with Spacer in 10nm Node

S Howldar, B Balaji, K Srinivasa Rao - International Journal of Engineering, 2024 - ije.ir
This paper investigates the electrical behavior and performance of a Dual Metal Gate
Overlap on Drain Side Tunnel Field Effect Transistor with Spacer (DMG-ODS-TFET) in 10 …

Linearity performance and intermodulation distortion analysis of D-MOS vertical TFET

VD Wangkheirakpam, B Bhowmick, PD Pukhrambam - Applied Physics A, 2021 - Springer
Recent trend researches provide potential results of tunnel field effect transistors (TFETs) for
being used in many electronic circuit applications. This work studies the comparative …

Hysteresis impact of ferroelectric oxide on double-source vertical tunnel FET: DC and RF performance

D Madadi - The European Physical Journal Plus, 2024 - Springer
This work presents a detailed TCAD investigation of the double-source vertical junction
tunneling field-effect transistor (DSV-TFET) by ferroelectric gate oxide material (FE-DSV …

Investigation of temperature variation and interface trap charges in dual MOSCAP TFET

VD Wangkheirakpam, B Bhowmick, PD Pukhrambam - Silicon, 2021 - Springer
This work performs the investigation of Dual MOS-Capacitor (D-MOS) TFET having a δ-
Doped architecture. Three different structural variations are studied and it is found that the …

A 640× 512 ROIC with optimized BDI input stage and low power output buffer for CQDs-based infrared image sensor

H Li, A Hu, Z Nie, D Liu, G Niu, L Gao, J Tang - Microelectronics journal, 2022 - Elsevier
A 640× 512 readout integrated circuit (ROIC) for colloidal quantum dots (CQDs) infrared
image sensor is presented in this paper. An optimized buffered direct injection (BDI) pixel …

Design and Simulation of Symmetrical Dual Gate on Drain Side with Overlapped and Underlapped Regions of TFET

TN Swathi, V Megala - Silicon, 2023 - Springer
Abstract A unique Symmetrical Dual Metal Gate Extended on drain side with overlapped and
underlapped three regions of Tunnel Field Effect Transistor (DG-ED-TFET) have been …