A 150Mbit/s 3GPP LTE turbo code decoder
M May, T Ilnseher, N Wehn… - 2010 Design, Automation …, 2010 - ieeexplore.ieee.org
3 GPP long term evolution (LTE) enhances the wireless communication standards UMTS
and HSDPA towards higher throughput. A throughput of 150 Mbit/s is specified for LTE using …
and HSDPA towards higher throughput. A throughput of 150 Mbit/s is specified for LTE using …
VLSI implementation of a multi-mode turbo/LDPC decoder architecture
Flexible and reconfigurable architectures have gained wide popularity in the
communications field. In particular, reconfigurable architectures for the physical layer are an …
communications field. In particular, reconfigurable architectures for the physical layer are an …
Trends and challenges in LDPC hardware decoders
T Mohsenin, B Baas - 2009 Conference Record of the Forty …, 2009 - ieeexplore.ieee.org
Over the last decade low density parity check (LDPC) codes have received significant
attention due to their superior error correction performance, and have been adopted by …
attention due to their superior error correction performance, and have been adopted by …
Implementation of a high throughput 3GPP turbo decoder on GPU
Turbo code is a computationally intensive channel code that is widely used in current and
upcoming wireless standards. General-purpose graphics processor unit (GPGPU) is a …
upcoming wireless standards. General-purpose graphics processor unit (GPGPU) is a …
A multi-standard flexible turbo/LDPC decoder via ASIC design
G Gentile, M Rovini, L Fanucci - 2010 6th International …, 2010 - ieeexplore.ieee.org
This paper describes the first complete design of a single-core multi-standard flexible
Turbo/LDPC decoder using an ASIC approach. Such a solution outperforms other state-of …
Turbo/LDPC decoder using an ASIC approach. Such a solution outperforms other state-of …
Implementation of a 3GPP LTE turbo decoder accelerator on GPU
This paper presents a 3GPP LTE compliant turbo decoder accelerator on GPU. The
challenge of implementing a turbo decoder is finding an efficient mapping of the decoder …
challenge of implementing a turbo decoder is finding an efficient mapping of the decoder …
A network-on-chip-based turbo/LDPC decoder architecture
The current convergence process in wireless technologies demands for strong efforts in the
conceiving of highly flexible and interoperable equipments. This contribution focuses on one …
conceiving of highly flexible and interoperable equipments. This contribution focuses on one …
A flexible NISC-based LDPC decoder
Low density parity-check (LDPC) codes, are widely used for error correction in digital
communication systems. Their inclusion in communication standards requires to define …
communication systems. Their inclusion in communication standards requires to define …
Flexible channel decoder
G Gentile, M Rovini, P Burzigotti, L Fanucci - US Patent 8,879,670, 2014 - Google Patents
A configurable Turbo-LDPC decoder having A set of P> 1 Soft-Input-Soft-Output decoding
units (DP 0-DP P-1; DP i) for iteratively decoding both Turbo-and LDPC-encoded input data …
units (DP 0-DP P-1; DP i) for iteratively decoding both Turbo-and LDPC-encoded input data …