Hardware-assisted machine learning in resource-constrained IoT environments for security: review and future prospective
G Kornaros - IEEE Access, 2022 - ieeexplore.ieee.org
As the Internet of Things (IoT) technology advances, billions of multidisciplinary smart
devices act in concert, rarely requiring human intervention, posing significant challenges in …
devices act in concert, rarely requiring human intervention, posing significant challenges in …
Formal approaches to secure compilation: A survey of fully abstract compilation and related work
Secure compilation is a discipline aimed at developing compilers that preserve the security
properties of the source programs they take as input in the target programs they produce as …
properties of the source programs they take as input in the target programs they produce as …
{CURE}: A security architecture with {CUstomizable} and resilient enclaves
R Bahmani, F Brasser, G Dessouky… - 30th USENIX Security …, 2021 - usenix.org
Security architectures providing Trusted Execution Environments (TEEs) have been an
appealing research subject for a wide range of computer systems, from low-end embedded …
appealing research subject for a wide range of computer systems, from low-end embedded …
CHERI: A hybrid capability-system architecture for scalable software compartmentalization
RNM Watson, J Woodruff, PG Neumann… - … IEEE Symposium on …, 2015 - ieeexplore.ieee.org
CHERI extends a conventional RISC Instruction-Set Architecture, compiler, and operating
system to support fine-grained, capability-based memory protection to mitigate memory …
system to support fine-grained, capability-based memory protection to mitigate memory …
A tale of two worlds: Assessing the vulnerability of enclave shielding runtimes
This paper analyzes the vulnerability space arising in Trusted Execution Environments
(TEEs) when interfacing a trusted enclave application with untrusted, potentially malicious …
(TEEs) when interfacing a trusted enclave application with untrusted, potentially malicious …
Mind: In-network memory management for disaggregated data centers
Memory disaggregation promises transparent elasticity, high resource utilization and
hardware heterogeneity in data centers by physically separating memory and compute into …
hardware heterogeneity in data centers by physically separating memory and compute into …
NetFPGA SUME: Toward 100 Gbps as research commodity
The demand-led growth of datacenter networks has meant that many constituent
technologies are beyond the research community's budget. NetFPGA SUME is an FPGA …
technologies are beyond the research community's budget. NetFPGA SUME is an FPGA …
{PAC} it up: Towards pointer integrity using {ARM} pointer authentication
H Liljestrand, T Nyman, K Wang, CC Perez… - 28th USENIX Security …, 2019 - usenix.org
Run-time attacks against programs written in memory-unsafe programming languages (eg,
C and C++) remain a prominent threat against computer systems. The prevalence of …
C and C++) remain a prominent threat against computer systems. The prevalence of …
ISA Semantics for ARMv8-a, RISC-v, and CHERI-MIPS
A Armstrong, T Bauereiss, B Campbell, A Reid… - Proceedings of the …, 2019 - dl.acm.org
Architecture specifications notionally define the fundamental interface between hardware
and software: the envelope of allowed behaviour for processor implementations, and the …
and software: the envelope of allowed behaviour for processor implementations, and the …
Sledge: A serverless-first, light-weight wasm runtime for the edge
PK Gadepalli, S McBride, G Peach… - Proceedings of the 21st …, 2020 - dl.acm.org
Emerging IoT applications with real-time latency constraints require new data processing
systems operating at the Edge. Serverless computing offers a new compelling paradigm …
systems operating at the Edge. Serverless computing offers a new compelling paradigm …