Multiple process scheduling of threads using process queues
RA Blaine, DA Chimene, S Sen, JM Magee - US Patent 10,140,157, 2018 - Google Patents
Techniques for scheduling threads for execution in a data processing system are described
herein. According to one embodiment, in response to a request for executing a thread, a …
herein. According to one embodiment, in response to a request for executing a thread, a …
System and method for thread scheduling on reconfigurable processor cores
AR Alameldeen, CB Wilkerson, E Gorbatov… - US Patent …, 2017 - Google Patents
BACKGROUND Traditional processor core microarchitectures do not adapt well to the
thread level parallelism available in pro grams. While large out-of-order (OOO) cores are …
thread level parallelism available in pro grams. While large out-of-order (OOO) cores are …
Mapping of queues for virtual machines
M Tsirkin, D Laor - US Patent 8,745,237, 2014 - Google Patents
A method and system for managing multiple queues of a networking device associated with
a host machine in a virtual machine system. The networking device includes multiple …
a host machine in a virtual machine system. The networking device includes multiple …
NUMA aware system task management
D Waddington, C Tian - US Patent 9,152,468, 2015 - Google Patents
RD Blumofe and CE Leiserson. Scheduling multithreaded com putations by work stealing. In
Symposium on Foundations of Com puter Science, pp. 356-368, 1994. P. Charles, C …
Symposium on Foundations of Com puter Science, pp. 356-368, 1994. P. Charles, C …
Distributed processing of mixed serial and concurrent workloads
MR Chowdhury, G Coonrod, A Srivastav… - US Patent …, 2019 - Google Patents
Provided is a process, including: obtaining a task tree; traversing the task tree to obtain an
unordered set of tasks and an ordered list of tasks; adding the unordered set of tasks to at …
unordered set of tasks and an ordered list of tasks; adding the unordered set of tasks to at …
Method for application-aware interrupts management
F Liu, YS Ki, SUN Xiling - US Patent 9,965,412, 2018 - Google Patents
According to one embodiment, a computer system includes a host computer, and a storage
device coupled to the host computer. The host computer has a user-space device driver of …
device coupled to the host computer. The host computer has a user-space device driver of …
Techniques for ephemeral messaging with a message queue
M Steiner, J Fein, E Murphy-Chutorian, T Yang… - US Patent …, 2019 - Google Patents
5, 964, 841 A 10/1999 Rekhter 6, 058, 389 A* 5/2000 Chandra............ G06F 9/546 6, 145,
031 A* 11/2000 Mastie................. GO6F 3/1211 710/40 7, 565, 407 B1 7/2009 Hayball 8, 972 …
031 A* 11/2000 Mastie................. GO6F 3/1211 710/40 7, 565, 407 B1 7/2009 Hayball 8, 972 …
System and method for dividing and synchronizing a processing task across multiple processing elements/processors in hardware
JD Beeson, JB Yates - US Patent 9,753,658, 2017 - Google Patents
ABSTRACT A shared counter resource, such as a register, is disclosed in the hardware,
where the register representing how much free space there is in the command queue is …
where the register representing how much free space there is in the command queue is …
Systems and methods for implementing work stealing using a configurable separation of stealable and non-stealable work items
Y Lev, GL Steele Jr - US Patent 9,317,339, 2016 - Google Patents
US9317339B2 - Systems and methods for implementing work stealing using a configurable
separation of stealable and non-stealable work items - Google Patents US9317339B2 - Systems …
separation of stealable and non-stealable work items - Google Patents US9317339B2 - Systems …
Obtaining correct compile results by absorbing mismatches between data types representations
Methods and a system are provided. A method includes implementing a function, which a
compiler for a first language does not have, using a compiler for a second language. The …
compiler for a first language does not have, using a compiler for a second language. The …