Efficient butterfly inspired optimization algorithm for analog circuits design

A Lberni, MA Marktani, A Ahaitouf, A Ahaitouf - Microelectronics Journal, 2021 - Elsevier
In this paper for the first time a butterfly inspired optimization algorithm, both in single-and
multi-objective version is adapted for analog circuit design. As design examples a two-stage …

Frequency compensation techniques for op-amps and LDOs: A tutorial overview

A Garimella, PM Furth - 2011 IEEE 54th International Midwest …, 2011 - ieeexplore.ieee.org
Today's op-amp is not just a stand-alone IC, rather it is more custom and complex, catering
the needs of highly integrated SoC. Tighter line and load regulation, low quiescent current …

Voltage buffer compensation using Flipped Voltage Follower in a two-stage CMOS op-amp

SH Pakala, M Manda, PR Surkanti… - 2015 IEEE 58th …, 2015 - ieeexplore.ieee.org
In Miller and current buffer compensation techniques, the compensation capacitor often
loads the output node. If a voltage buffer is used in feedback, the compensation capacitor …

Low dropout (LDO) voltage regulator design using split-length compensation

PM Furth, NR Thota, VH Nammi… - 2012 IEEE 55th …, 2012 - ieeexplore.ieee.org
We explore the application of split-length compensation to the design of a three-stage low
dropout (LDO) voltage regulator. Initially, we review three basic compensation techniques …

一种采用电流缓冲器的反嵌套密勒补偿型LDO.

张森, 唐威, 商世广, 姚和平… - Journal of Chongqing …, 2022 - search.ebscohost.com
为了提高低压差线性稳压器(low dropout regulatorꎬ LDO) 在全负载电流范围内的稳定性ꎬ
提出了一种采用电流缓冲器的反嵌套密勒补偿结构(reverse nested miller compensation with …

Pole-zero analysis of multi-stage amplifiers: A tutorial overview

PR Surkanti, A Garimella… - 2011 IEEE 54th …, 2011 - ieeexplore.ieee.org
Analyzing pole-zero locations of an amplifier is essential to 1) understand the characteristics
of a circuit in the frequency domain, and 2) choose appropriate frequency compensation …

Current buffer compensation topologies for LDOs with improved transient performance

A Garimella, PM Furth, PR Surkanti… - Analog Integrated Circuits …, 2012 - Springer
The goal of internal frequency compensation of a low dropout voltage regulator (LDO) is the
selection of a small-value, ESR-independent output capacitor. Cascode compensation …

Pole-zero analysis of low-dropout (LDO) regulators: A tutorial overview

A Garimella, PR Surkanti… - 2012 25th International …, 2012 - ieeexplore.ieee.org
Analyzing poles and zeros of a circuit is often essential for (a) choose the appropriate
topology for given specifications,(b) understanding the frequency response of the circuit and …

1.2-V analog interface for a 300-MSps HD video digitizer in core 65-nm CMOS

SA Aamir, P Angelov, JJ Wikner - IEEE Transactions on Very …, 2013 - ieeexplore.ieee.org
This paper describes the front-end of a fully integrated analog interface for 300 MSps, high-
definition video digitizers in a system on-chip environment. The analog interface is …

Trade-offs among power consumption and other design parameters of two-stage recycling folded cascode OTA that using embedded cascode current buffer …

B Wen, Q Zhang, X Zhao, X Lv, Y Wang - Integration, 2019 - Elsevier
Being able to solve specific issues and meet specific requirements are the goals of
designing a two-stage OTA, but how to optimize the trade-offs among its various …