Hyper-systolic matrix multiplication

T Lippert, N Petkov, P Palazzari, K Schilling - Parallel Computing, 2001 - Elsevier
Hyper-systolic matrix multiplication - ScienceDirect Skip to main contentSkip to article
Elsevier logo Journals & Books Search RegisterSign in View PDF Download full issue …

[图书][B] High performance dynamic array structures

RC Oehmke - 2004 - search.proquest.com
Simple arrays are often modified into more complex dynamic structures in order to increase
the efficiency of applications. Two examples of these dynamic array structures are the …

Designing hardware for protein sequence analysis

A Marongiu, P Palazzari, V Rosato - Bioinformatics, 2003 - academic.oup.com
We present the architecture of PROSIDIS, a special purpose co-processor designed to
search for the occurrence of substrings similar to a given 'template string'within a proteome …

Heterogeneity as key feature of high performance computing: The PQE1 prototype

P Palazzari, L Arrcipiani, M Celino… - … (HCW 2000)(Cat …, 2000 - ieeexplore.ieee.org
Presents the results of a project aimed at assembling a hybrid massively parallel machine,
the PQE1 prototype, which is devoted to the simulation of complex physical models. The …

Parallel Tiled Code for Computing General Linear Recurrence Equations

W Bielecki, P Błaszyński - Electronics, 2021 - mdpi.com
In this article, we present a technique that allows us to generate parallel tiled code to
calculate general linear recursion equations (GLRE). That code deals with multidimensional …

High level software synthesis of affine iterative algorithms onto parallel architectures

A Marongiu, P Palazzari, L Cinque… - … Conference on High …, 2000 - Springer
In this work a High Level Software Synthesis (HLSS) methodology is presented. HLSS
allows the automatic generation of a parallel program starting from a sequential C program …

Automatic implementation of affine iterative algorithms: Design flow and communication synthesis

A Marongiu, P Palazzari - Computer physics communications, 2001 - Elsevier
This work addresses the automatic generation of a parallel architecture, described by the
skeleton of a VHDL program at the Register Transfer Level, starting from some high level …

Prosidis: a special purpose processor for protein similarity discovery

A Marongiu, P Palazzari… - … International Parallel and …, 2003 - ieeexplore.ieee.org
This work presents the architecture of PROSIDIS, a special purpose processor designed to
search for the occurrence of substrings similar to a given'template string'within a proteome …

Błaszy nski, P. Parallel Tiled Code for Computing General Linear Recurrence Equations. Electronics 2021, 10, 2050

W Bielecki - 2021 - search.proquest.com
In this article, we present a technique that allows us to generate parallel tiled code to
calculate general linear recursion equations (GLRE). That code deals with multidimensional …

A specialized hardware device for the protein similarity search

A Marongiu, P Palazzari… - … and Computation: Practice …, 2004 - Wiley Online Library
This work presents the architecture of PROSIDIS, a special purpose processor designed to
search for the occurrence of substrings similar to a given 'template string'within a proteome …