One embodiment facilitates mitigating write amplification in a phase change memory-based
storage device. During operation, the system receives, by a controller of the storage device …

One embodiment facilitates in-line deduplication in a storage device. During operation, the
system receives, by a controller of the storage device, data to be stored. The system …

One embodiment facilitates a write operation in a shingled magnetic recording device.
During operation, the system receives, by the storage device, data to be written to the …

One embodiment facilitates a write operation in a shingled magnetic recording device.
During operation, the system receives, by a controller module of the device, a request to …

In one embodiment, A processor includes a logic to receive performance monitoring
information from at least some of a plurality of cores and determine, according to a power …

One or more chip-embedded integrated voltage regulators (“CEIVR's”) are configured to
provide power to a circuit or chip such as a CPU or GPU and meet power delivery …

One embodiment facilitates a high-priority read. During operation, the system receives, by a
controller module of a storage device, a first request to write first data to a non-volatile …

One embodiment facilitates global data placement in a storage device. The system receives
a request to write first data. The system selects one of a plurality of physical media of the …

A computer-implemented method for dynamically managing the power usage and/or
performance of an artificial intelligence (AI) hardware accelerator may include (1) receiving …

A direct current to direct current (DC-DC) converter can include a chip embedded integrated
circuit (IC), one or more switches, and an inductor. The IC can be embedded in a PCB. The …