The signal processing is advancing day by day as its needs and in wireline/wireless
communication technology from 2G to 4G cellular communication technology with CMOS …

This paper presents a digital blind background calibration technique of imperfections in time-
interleaved analog-to-digital converters (TI-ADCs). The proposed technique directly …

In this paper, a statistics-based digital background calibration technique for pipelined analog-
to-digital converters (ADCs) is presented. This technique employs the residue voltage …

This brief presents a digital background calibration technique for pipelined analog-to-digital
converters (ADCs). It is a histogram-based technique and called the correction with …

A digital background calibration technique for pipelined analog-to-digital converters (ADCs)
is proposed to correct the capacitor mismatch, finite dc gain, and nonlinearity of residue …

The CMOS scaling and power usage limitations make the calibration techniques inevitable
in the design and implementation of pipeline analog-to-digital converters (ADCs) especially …

This paper presents a multirate predictive successive approximation register (SAR) analog-
to-digital converter (ADC). The main objective is to introduce digital frameworks for resolving …

In this article, a 3-bit Flash spin-orbit torque analog-to-digital converter (SOT-ADC) is
presented, which works based on switching of a perpendicular-anisotropy magnetic tunnel …

Pipelined analog-to-digital converters (ADCs) are fundamental components of various
signal processing systems requiring high sampling rates and a high linearity. Over the past …

This brief presents a digital background calibration technique for pipelined analog-to-digital
converters (ADCs) to correct the capacitor mismatch, finite dc gain, and nonlinearity of …