Recent progress on negative capacitance tunnel FET for low-power applications: Device perspective

AK Upadhyay, SB Rahi, S Tayal, YS Song - Microelectronics Journal, 2022 - Elsevier
In the present-day scenario of low-power electronics, there is a steady and increasing need
for an adequate device that can counteract the power dissipation issue due to the consistent …

Enhancement of Thermal Characteristics and On-Current in GAA MOSFET by Utilizing Al2O3-Based Dual-κ Spacer Structure

YS Song, S Kim, JH Kim, G Kim… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
By utilizing the dual-spacer (DS) technique, a novel structure has been proposed to improve
the thermal characteristics and ON-current (in gate-all-around (GAA) MOSFETs. The …

Reliable high-voltage drain-extended FinFET with thermoelectric improvement

KY Kim, YS Song, G Kim, S Kim… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
In this article, a reliable drain-extended (De) fin-shaped field-effect transistor (DeFinFET)
with improved thermal performance and electrical performance is proposed for high-voltage …

Comparison of Fitting Current–Voltage Characteristics Curves of FinFET Transistors with Various Fixed Parameters

HC Yang, SC Chi, WS Liao - Applied Sciences, 2022 - mdpi.com
In the deep submicron regime, FinFET successfully suppresses the leakage current using a
3D fin-like channel substrate, which gets depleted and blocks possible leakage as the gate …

Conclusive Model-Fit Current–Voltage Characteristic Curves with Kink Effects

HC Yang, SC Chi - Applied Sciences, 2023 - mdpi.com
Current–voltage characteristic curves of NFinFET are presented and fitted with modified
current–voltage (IV) formulas, where the modified term in the triode region is demonstrated …

Dielectric Material and Thermal Optimization in Sidewall Spacer Design for Junctionless Nanosheet FETs at Sub-5 nm Technology Node: An Insight into Device and …

V Indhur, UM Dupati, M Lakkarasu… - ECS Journal of Solid …, 2024 - iopscience.iop.org
This study focuses on the design and analysis of Junctionless (JL) NSFETs, with an
emphasis on the influence of spacer materials and temperature variations. A different …

Improvement of Thermal Characteristics and On-current in Vertically Stacked Nanosheet FET by Parasitic Channel Height Engineering

YS Song, H Kim, JH Kim - IEEE Access, 2024 - ieeexplore.ieee.org
For improving thermal characteristics and on-current () in vertically stacked nanosheet field-
effect transistor (NSFET), the effect of parasitic channel height () on thermal and electrical …

[HTML][HTML] A Conclusive Algorithm with Kink Effects for Fitting 3-D FinFET and Planar MOSFET Characteristic Curves

HC Yang, SC Chi, HY Yang, YT Yang - Applied Sciences, 2024 - mdpi.com
FinFET transistors with fin channel lengths of 160 nm and 2000 nm and a planar MOSFET
transistor with channel lengths of 180 nm and 90 nm are presented with characteristic …

Final Summary and Future of Advanced Ultra Low Power Metal Oxide Semiconductor Field Effect Transistors

YS Song, SB Rahi, S Kossar… - Advanced Ultra Low …, 2023 - Wiley Online Library
So far, various state‐of‐art techniques have been widely addressed to design ultra‐low
power semiconductors. Doping technique (TFET, junctionless transistor), oxide material …

Multiwafer Process: Wafer Selection and Wafer Cleaning

LR Thoutam, YS Song - … of Emerging Materials for Semiconductor Industry, 2024 - Springer
In semiconductor manufacturing, one of the most important processes is wafer fabrication
and wafer cleaning. Even if a wafer appears free of scratches to the naked eye, there are …