A new twelve-transistor approximate 4: 2 compressor in CNTFET technology

S Shirinabadi Farahani… - International Journal of …, 2019 - Taylor & Francis
Power consumption is a serious concern in the field of digital design. Reducing power
supply voltage, power gating, transistor downscaling, voltage over scaling, applying modern …

Comparison and design of energy-efficient approximate multiplier schemes for image processing by CNTFET

E Tavakkoli, S Shokri, M Aminian - International Journal of …, 2024 - Taylor & Francis
Approximate computing is an emerging paradigm that can tolerate some loss of accuracy to
improve the energy consumption and design complexity. Multiplication is one of the …

[PDF][PDF] A novel 4× 4 universal reversible gate as a cost efficient full adder/subtractor in terms of reversible and quantum metrics

S Moghimi, MR Reshadinezhad - IJMECS, 2015 - academia.edu
This paper proposes a new 4× 4 reversible logic gate which is named as MOG. Reversible
gates are logical basic units, having equal number of input and output lines, which can …

Energy efficient design of four-operand multiplier architecture using cntfet technology

N Charmchi, MR Reshadinezhad - 2018 - essuir.sumdu.edu.ua
Multiplication is an essential part of digital arithmetic, due to its application in video and
voice processing, FIR filters, cryptography and other related concepts. Reducing the power …

[PDF][PDF] Design of an efficient current mode full-adder applying carbon nanotube technology

P Nejadzadeh, MR Reshadinezhad - International Journal of Modern …, 2018 - academia.edu
In this article a new design of a current mode full-adder is proposed through the field effect
transistors based on carbon nanotubes. The outperformance of the current mode full-adder …

Design of a parity preserving reversible full adder/subtractor circuit

SR Arabani, MR Reshadinezhad… - International Journal …, 2018 - inderscienceonline.com
The reversible logical circuits, due to their economised power consumption in comparison
with their counterparts with binary circuits, have become a major issue of study. A reversible …

Design and analysis of energy‐efficient compressors based on low‐power XOR gates in carbon nanotube technology

E Tavakkoli, M Aminian - IET Circuits, Devices & Systems, 2022 - Wiley Online Library
Compressors are the fundamental components in multipliers to accumulate and reduce
partial product stages in a parallel manner. This study presents several architectures for low …

A new high speed 2 n–1 modular adder based on carbon nano tube field effect transistors

M Ahmadi, MR Reshadinezhad - Journal of Nanoelectronics …, 2018 - ingentaconnect.com
Most important modules in the Redundant Number System (RNS) consist of 2 n, 2 n–1 and 2
n+ 1. The 2 n–1 modular adders which are of higher diversity in their application in DSP …

[PDF][PDF] A Novel High-speed Two-operand Multiplier using CNFET Technology

N Charmchi, M Reshadinezhad - International Journal of Advanced …, 2015 - ijaist.com
Multiplication is a crucial process in digital arithmetic, due to its application in multi-
dimensional graphics, FIR filters, cryptography, etc. Researchers focus on reducing the …

[PDF][PDF] A new high-performance bridge structure for 4-to-2 compressor using CMOS and CNFET technology

M Darvishi, M Bagherizadeh - International Journal of Modern …, 2017 - mecs-press.org
In this paper, a new high-speed and energy efficient 4-to-2 compressor cell was presented
using carbon nanotube field effect transistors (CNFETs). CNFET is very suitable for high …