A survey of optimization techniques for thermal-aware 3D processors
Interconnect scaling has become a major design challenge for traditional planar (2D)
integrated circuits (ICs). Three-dimensional (3D) IC that stacks multiple device layers …
integrated circuits (ICs). Three-dimensional (3D) IC that stacks multiple device layers …
Per-die based memory refresh control based on a master controller
VK Tavva - US Patent 9,734,887, 2017 - Google Patents
Embodiments include a method, system, and computer program product for per-die based
memory refresh control in a hybrid memory cube (HMC). A method includes reading a …
memory refresh control in a hybrid memory cube (HMC). A method includes reading a …
DRAMSys: a flexible DRAM subsystem design space exploration framework
In systems ranging from mobile devices to servers, Dynamic Random Access Memories
(DRAM) have a big impact on performance and contributes a significant part of the total …
(DRAM) have a big impact on performance and contributes a significant part of the total …
Approximate computing with partially unreliable dynamic random access memory-approximate DRAM
In the context of approximate computing, Approximate Dynamic Random Access Memory
(ADRAM) enables the tradeoff between energy efficiency, performance and reliability. The …
(ADRAM) enables the tradeoff between energy efficiency, performance and reliability. The …
Omitting refresh: A case study for commodity and wide i/o drams
Dynamic Random Access Memories (DRAM) have a big impact on performance and
contribute significantly to the total power consumption in systems ranging from mobile …
contribute significantly to the total power consumption in systems ranging from mobile …
Wide I/O or LPDDR? Exploration and analysis of performance, power and temperature trade-offs of emerging DRAM technologies in embedded MPSoCs
MH Hajkazemi, MK Tavana… - 2015 33rd IEEE …, 2015 - ieeexplore.ieee.org
Wide I/O, the recent JEDEC DRAM standard, has created an opportunity for architects to
overcome the" memory wall" challenge. 2.5 D/3D integration enables Wide-IO to deliver high …
overcome the" memory wall" challenge. 2.5 D/3D integration enables Wide-IO to deliver high …
Driving into the memory wall: the role of memory for advanced driver assistance systems and autonomous driving
Autonomous driving is disrupting conventional automotive development. Underlying
reasons include control unit consolidation, the use of components originally developed for …
reasons include control unit consolidation, the use of components originally developed for …
Efficient reliability management in SoCs-an approximate DRAM perspective
In today's computing systems Dynamic Random Access Memories (DRAMs) have a large
influence on performance and contribute significantly to the total power consumption. Thus …
influence on performance and contribute significantly to the total power consumption. Thus …
Optimized active and power-down mode refresh control in 3D-DRAMs
3D stacked systems with Wide-I/O DRAMs are the future density optimized mobile
computing platforms. Unfortunately, with 3D integration, the power densities and thermal …
computing platforms. Unfortunately, with 3D integration, the power densities and thermal …
System and method for temperature compensated refresh of dynamic random access memory
HJ Lo, DT Chun - US Patent 9,640,242, 2017 - Google Patents
OTHER PUBLICATIONS www. Micron. com, Title:“Mobile DRAM power-saving features and
power calculations.” Micron Technology 2005; Rev. B. May 2009 EN, pp. No. 01-10 …
power calculations.” Micron Technology 2005; Rev. B. May 2009 EN, pp. No. 01-10 …