A survey of on-chip optical interconnects
Numerous challenges present themselves when scaling traditional on-chip electrical
networks to large manycore processors. Some of these challenges include high latency …
networks to large manycore processors. Some of these challenges include high latency …
Optics in computing: From photonic network-on-chip to chip-to-chip interconnects and disintegrated architectures
Following a decade of radical advances in the areas of integrated photonics and computing
architectures, we discuss the use of optics in the current computing landscape attempting to …
architectures, we discuss the use of optics in the current computing landscape attempting to …
Suor: Sectioned undirectional optical ring for chip multiprocessor
Chip multiprocessor (CMP) is becoming an attractive platform for applications seeking both
high performance and high energy efficiency. In large-scale CMPs, the communication …
high performance and high energy efficiency. In large-scale CMPs, the communication …
Systematic analysis of crosstalk noise in folded-torus-based optical networks-on-chip
Photonic devices are widely used in optical networks-on-chip (ONoCs) and suffer from
crosstalk noise. The accumulative crosstalk noise in large scale ONoCs diminishes the …
crosstalk noise. The accumulative crosstalk noise in large scale ONoCs diminishes the …
Towards efficient on-chip communication: A survey on silicon nanophotonics and optical networks-on-chip
UU Nisa, J Bashir - Journal of Systems Architecture, 2024 - Elsevier
Silicon nanophotonics, with its high-speed, low-loss optical interconnects, and high
computation capabilities, is seen as one of the promising technologies that can easily …
computation capabilities, is seen as one of the promising technologies that can easily …
Flat-topology high-throughput compute node with AWGR-based optical-interconnects
This study presents simulation studies on the execution time and energy consumption of
optical multi-socket boards with on-chip, all-to-all, and contention-less arrayed waveguide …
optical multi-socket boards with on-chip, all-to-all, and contention-less arrayed waveguide …
Chameleon: Channel efficient optical network-on-chip
The next generation of MPSoC points to the integration of thousands of IP cores, requiring
high performance interconnect for high throughput communications. Optical on-chip …
high performance interconnect for high throughput communications. Optical on-chip …
TRINE: A Tree-Based Silicon Photonic Interposer Network for Energy-Efficient 2.5 D Machine Learning Acceleration
2.5 D chiplet systems have showcased low manufacturing costs and modular designs for
machine learning (ML) acceleration. Nevertheless, communication challenges arise from …
machine learning (ML) acceleration. Nevertheless, communication challenges arise from …
H2ONoC: A Hybrid Optical–Electronic NoC Based on Hybrid Topology
Next-generation chip multiprocessors will require communication performance levels that
cannot be achieved by traditional electronic ON-chip interconnects. Silicon photonics has …
cannot be achieved by traditional electronic ON-chip interconnects. Silicon photonics has …