Bus-invert coding for low-power I/O
MR Stan, WP Burleson - IEEE Transactions on very large scale …, 1995 - ieeexplore.ieee.org
Technology trends and especially portable applications drive the quest for low-power VLSI
design. Solutions that involve algorithmic, structural or physical transformations are sought …
design. Solutions that involve algorithmic, structural or physical transformations are sought …
A survey of power estimation techniques in VLSI circuits
FN Najm - IEEE transactions on very large scale integration …, 1994 - ieeexplore.ieee.org
With the advent of portable and high-density microelectronic devices, the power dissipation
of very large scale integrated (VLSI) circuits is becoming a critical concern. Accurate and …
of very large scale integrated (VLSI) circuits is becoming a critical concern. Accurate and …
Estimation of average switching activity in combinational and sequential circuits
We address the problem of estimating the average power dissipated in VLSI combinational
and sequential circuits, under random input sequences. Switch-ing activity is strongly …
and sequential circuits, under random input sequences. Switch-ing activity is strongly …
A Monte Carlo approach for power estimation
R Burch, FN Najm, P Yang… - IEEE Transactions on Very …, 1993 - ieeexplore.ieee.org
The authors investigate a power estimation technique for VLSI that combines the accuracy of
simulation-based techniques with the speed of the probabilistic techniques. The resulting …
simulation-based techniques with the speed of the probabilistic techniques. The resulting …
Estimation of standby leakage power in CMOS circuits considering accurate modeling of transistor stacks
Low supply voltage requires the device threshold to be reduced in order to maintain
performance. Due to the exponential relationship between leakage current and threshold …
performance. Due to the exponential relationship between leakage current and threshold …
Transition density: A new measure of activity in digital circuits
FN Najm - IEEE Transactions on Computer-Aided Design of …, 1993 - ieeexplore.ieee.org
Noting that a common element in most causes of runtime failure is the extent of circuit
activity, ie the rate at which its nodes are switching, the author proposes a measure of …
activity, ie the rate at which its nodes are switching, the author proposes a measure of …
The design and implementation of PowerMill
In this paper we discuss the design and implementation of the simulator PowerMill, a novel
transistor level simulator for the simulation of current and power behavior in vlsi circuits. With …
transistor level simulator for the simulation of current and power behavior in vlsi circuits. With …
Optimizing power using transformations
AP Chandrakasan, M Potkonjak… - … on Computer-Aided …, 1995 - ieeexplore.ieee.org
The increasing demand for portable computing has elevated power consumption to be one
of the most critical design parameters. A high-level synthesis system, HYPER-LP, is …
of the most critical design parameters. A high-level synthesis system, HYPER-LP, is …
Architectural power analysis: The dual bit type method
PE Landman, JM Rabaey - IEEE Transactions on Very Large …, 1995 - ieeexplore.ieee.org
This paper describes a novel strategy for generating accurate black-box models of datapath
power consumption at the architecture level. This is achieved by recognizing that power …
power consumption at the architecture level. This is achieved by recognizing that power …
Embedded image coding using zeroblocks of subband/wavelet coefficients and context modeling
ST Hsiang - Proceedings DCC 2001. Data Compression …, 2001 - ieeexplore.ieee.org
In this paper, we present a new embedded wavelet image coding system using quadtree
splitting and context modeling. It features low computational complexity and high …
splitting and context modeling. It features low computational complexity and high …