This paper describes and evaluates a scalable and efficient resilience scheme based on the
concept of containment domains. Containment domains are a programming construct that …

Reliability is a serious concern for future extreme-scale high-performance computing (HPC)
systems. While the HPC community has developed various resilience solutions, the solution …

Fault injection is a widely used approach for experiment-based dependability evaluation.
Injecting faults to microarchitectural simulators is particularly appealing for researchers …

In this document, we develop a structured approach to the management of HPC resilience
based on the concept of resilience-based design patterns. A design pattern is a general …

Providing fault tolerance especially to mission critical applications in order to detect transient
and permanent faults and to recover from them is one of the main necessity for processor …

Reliability is an essential concern for processor designers due to increasing transient and
permanent fault rates. Executing instruction streams redundantly in chip multi processors …

Future exascale high-performance computing (HPC) systems will be constructed from VLSI
devices that will be less reliable than those used today, and faults will become the norm, not …

This report describes diverse error detection mechanisms that can be utilized within a
resilient system to protect applications against various types of errors and faults, both hard …

In the described embodiments, a processor core (eg, a GPU core) receives a section of
program code to be executed in a transaction from another entity in a computing device. The …

Transactional Memory (TM) has been touted as one of the most promising approaches to
concurrent programming for multi-core processors. By combining ease of use with high …