A fully integrated FVF LDO with enhanced full-spectrum power supply rejection

G Cai, Y Lu, C Zhan, RP Martins - IEEE Transactions on Power …, 2020 - ieeexplore.ieee.org
This article presents a fully integrated flipped voltage follower (FVF) based low-dropout
(LDO) regulator with enhanced full-spectrum power supply rejection (PSR) and unity-gain …

An external capacitorless low-dropout regulator with high PSR at all frequencies from 10 kHz to 1 GHz using an adaptive supply-ripple cancellation technique

Y Lim, J Lee, S Park, Y Jo, J Choi - IEEE Journal of Solid-State …, 2018 - ieeexplore.ieee.org
Herein is presented an external capacitorless low-dropout regulator (LDO) that provides
high-power-supply rejection (PSR) at all low-to-high frequencies. The LDO is designed to …

A 0.9-μA quiescent current high PSRR low dropout regulator using a capacitive feed-forward ripple cancellation technique

T Guo, W Kang, J Roh - IEEE Journal of Solid-State Circuits, 2022 - ieeexplore.ieee.org
This article presents a high power supply rejection ratio (PSRR) low dropout (LDO) regulator
with a low quiescent current. A low quiescent current capacitive feed-forward ripple …

A 65-nm CMOS low dropout regulator featuring> 60-dB PSRR over 10-MHz frequency range and 100-mA load current range

J Jiang, W Shu, JS Chang - IEEE Journal of Solid-State Circuits, 2018 - ieeexplore.ieee.org
One of the most critical attributes of low dropout regulators (LDOs) in increasingly complex
systems on chip (SoCs) is high-power supply rejection ratio (PSRR), not only over a wide …

A capacitor-less LDO with high-frequency PSR suitable for a wide range of on-chip capacitive loads

J Zarate-Roldan, M Wang, J Torres… - … Transactions on Very …, 2016 - ieeexplore.ieee.org
This paper presents an on-chip, low drop-out (LDO) voltage regulator with improved power-
supply rejection (PSR) able to drive large capacitive loads. The LDO compensation is …

A 5.6 μ a wide bandwidth, high power supply rejection linear low-dropout regulator with 68 dB of PSR up to 2 MHz

K Joshi, S Manandhar… - IEEE Journal of Solid …, 2020 - ieeexplore.ieee.org
High power supply rejection (PSR) with a wide rejection frequency band is becoming a
critical requirement in linear low-dropout regulators (LDOs) used in complex systems-on …

Capless LDO regulator achieving− 76 dB PSR and 96.3 fs FOM

SJ Yun, JS Yun, YS Kim - … on Circuits and Systems II: Express …, 2016 - ieeexplore.ieee.org
The performance of switching devices such as display driver ICs is degraded by large power
supply noise at switching frequencies from a few hundreds of kilohertz to a few megahertz …

Architectural advancement of digital low-dropout regulators

MA Akram, IC Hwang, S Ha - IEEE access, 2020 - ieeexplore.ieee.org
Digital Low-dropout (DLDO) regulators have been widely utilised for highly-efficient fine-
grained power delivery and management in system-on-chips (SoCs) due to their process …

Capacitorless self-clocked all-digital low-dropout regulator

MA Akram, W Hong, IC Hwang - IEEE Journal of Solid-State …, 2018 - ieeexplore.ieee.org
This paper presents a capacitorless self-clocked digital low-dropout (SC-DLDO) regulator
with self-shifting bidirectional shift registers (SS-BiSHRs) for power management …

An external capacitor-less ultralow-dropout regulator using a loop-gain stabilizing technique for high power-supply rejection over a wide range of load current

Y Lim, J Lee, Y Lee, SS Song, HT Kim… - … Transactions on Very …, 2017 - ieeexplore.ieee.org
An external capacitor-less ultra low-dropout (LDO) regulator that can continue to provide
high power-supply rejection (PSR) over a wide range of the load current is proposed. Using …